Method and apparatus for efficient read prefetching of instructi

Details Method and apparatus for efficient read prefetching of instructi Method and apparatus for efficient read prefetching of instructi

1992-10-01

1994-11-22

Gossage, Glenn

Boots, shoes, and leggings

395375, 395250, 364DIG1, G06F 926, G06F 934, G06F 1300

Patent

active

053676572

ABSTRACT:
A memory subsystem and method are disclosed in which instruction code read-prefetching is implemented in the memory subsystem itself. A single-line read-prefetch buffer is implemented in the memory subsystem. A memory controller includes an address buffer for read-prefetches, and a memory datapath includes a data buffer for read-prefetches. Smart read-prefetching is used in which only code(instruction) reads are prefetched, taking advantage of the sequentiality of code (instruction) type data as well as the page mode feature of dynamic random access memories.

REFERENCES:
patent: 3898624 (1975-08-01), Tobias
patent: 4095269 (1978-06-01), Kawabe et al.
patent: 4298927 (1981-11-01), Berglund et al.
patent: 4561052 (1985-12-01), Tateno
patent: 4621320 (1986-11-01), Holste et al.
patent: 4755933 (1988-07-01), Teshima et al.
patent: 4876642 (1989-10-01), Gibson
patent: 4879646 (1989-11-01), Iwasaki et al.
patent: 5113515 (1992-05-01), Fite et al.
patent: 5287512 (1994-02-01), Ellis

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