Method and apparatus for efficient mixed signal processing...

Amplifiers – Modulator-demodulator-type amplifier

Reexamination Certificate

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C330S20700P

Reexamination Certificate

active

06791404

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the field of switching amplifiers. More specifically, the present invention relates to a novel method of sampling in the signal modulation stage of a digital amplifier to achieve a highly accurate representation of the input signal at substantial gain.
2. Description of the Related Art
There have been various developments pertaining to oversampled, noise-shaping signal processing. These developments have been applicable to both continuous-time (analog) and discrete-time (digital or sampled analog) signals. The constant struggle in this field is to increase the efficiency of the amplifiers. Given the myriad of applications of sound applications in the electronics of today, it is apparent that an efficient audio amplification is highly desirable.
In response to this need, attempts have been made to design switching audio amplifiers using oversampled, noise-shaping modulators, especially delta-sigma modulators. A prior art first order delta-sigma modulator is shown in
FIG. 1. A
noise shaping network
102
is connected in series with a comparator
104
, which is a 1-bit quantizer with sampling rate f
s
. The output
105
of the comparator is fed back to the noise shaping network via summation element
106
. The feedback in turn forces the average value of the quantized output signal to track the average value of the input to the modulator
100
. Any difference between the quantized output and modulator input is accumulated in the noise shaping network
102
and eventually corrected. For first-order delta-sigma modulators, noise in the signal band due to quantization error is reduced by approximately 9 dB for each doubling of the oversampling ratio (OSR). The OSR is given by f
s
/2f
o
, where 2f
o
is the Nyquist rate, i.e., twice the bandwidth f
o
of the baseband signal, and f
s
is the previously mentioned 1-bit quantizer's sampling rate. For second-order delta-sigma modulators, this noise is reduced by approximately 15 dB (9 dB+6 dB) for the same increase in OSR. However, noise improvements achieved by increases in the OSR, i.e., increases in f
s
, are ultimately limited as the rise and fall times of the output signal become significant with respect to the sample period.
Accordingly, it would be highly desirable to employ aggressive noise shaping while at the same time maintaining a fixed signal feedback rate for improved noise shaping. This would allow efficient application of audio amplification in many of today's electronics such as multimedia computers.
SUMMARY OF THE INVENTION
A system and method of creating a highly efficient digital amplifier which can take either analog or digital inputs, and produce a high power accurate representation of the input to drive speakers or other low impedance load is described. The system employs a transition detector and delay unit which allows the comparator of the signal modulator to ignore its inputs for a pre-determined number of subsequent clock cycles once an output transition has been detected. Through the use of faster clocks and variable clock cycle skips upon the comparator's output transition, finer resolution of the feedback's clock period for noise-shaping purposes is achieved. Finer resolution of the clock period allows the present invention to employ a more aggressive noise-shaping than previously possible.
In another aspect of the invention, additional delta-sigma modulator noise suppression is obtained by using the common bridge implementation of the power output stage with the improvement of configuring the bridge to create a 3-state condition instead of the conventional 2 states. By controlling the two halves of the bridge independently of one another, an output with 3 states makes for improved noise shaping performance.


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A. J. Magrath, et al., “Power Digital-to-Analogue Conversion Using a Sigma-Delta Modulator with Controlled Limit cycles, ”Electronics Letters, Feb, 16, 1995, pp. 251-253, vol. 31, No. 4, IEE, Stevenage, Herts, GB. (XP000513671).
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