Method and apparatus for effectively doubling the operational sp

Details Method and apparatus for effectively doubling the operational sp Method and apparatus for effectively doubling the operational sp

1988-05-09

1989-10-10

Heyman, John S.

Electrical pulse counters, pulse dividers, or shift registers: c

Systems

Pulse multiplication or division

328 20, 307303, H03K 302

Patent

active

048737046

ABSTRACT:
A method and apparatus for effectively doubling the operational speed of certain digital circuit designs. In particular, a digital clock operating at a first frequency is utilized to effectively drive TTL shift registers at twice the frequency of the digital clock. This effective doubling of the clock speed is achieved without the necessity of resorting to expensive and high power consumption circuit designs.

REFERENCES:
patent: 3714470 (1973-01-01), Goldberg
patent: 4077010 (1978-02-01), Ryon
patent: 4669099 (1987-05-01), Zinn
patent: 4691170 (1987-09-01), Riley
patent: 4777448 (1988-10-01), Satoh
"A Simple Digital 2" Frequency Multiplier" by Kumar et al., Electronics, vol. 48, No. 1, pp. 43-45, 1/1980.

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