Method and apparatus for dynamically switching between asynchron

Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – Having selection between plural continuous waveforms

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Details

327298, 327144, 326 96, H03L 700, H03K 364

Patent

active

054831857

ABSTRACT:
A dynamic clock switching circuit in which a multiplexer (MUX) is connected to clock A and clock B. MUX control lines are encoded to signal clock A or clock B. A MUX control change detector is connected to the multiplexer and to the MUX control lines. A MUX control change detector decodes the MUX control lines and asserts a MUX change signal upon a condition that a change from one clock to another is signaled. A Hold Sync flip-flop is connected to a hold output of a Hold Start flip-flop. The Hold Sync flip-flop is connected to and clocked by the clock A. A Hold Disable flip-flop is connected to an OK to change output of the Hold Sync flip-flop. The Hold Disable flip-flop is connected to and clocked by clock A. A Clock Sync flip-flop is connected to a hold disable output of the Hold Disable flip-flop. A reset input of the Hold Start flip-flop is connected to a clock sync output of the Clock Sync flip-flop. An AND is connected to the hold output and to the hold disable output. An OR is connected to the MUX output and to an output of the AND. The OR has a gated clock output. A second OR is connected to the hold output and to the gated clock output. The second OR has a clock output. The Clock Sync flip-flop being clocked by the gated clock output. The hold start flip-flop is set by the MUX change signal and clocked by the clock output. The MUX control change detector is connected to the OK to change output of the Hold Sync flip-flop. The MUX control change detector includes logic for causing the MUX control lines to be gated to the multiplexer.

REFERENCES:
patent: 3226648 (1962-01-01), Davidson
patent: 4968899 (1990-11-01), Katsutani et al.
patent: 4970405 (1990-11-01), Hagiwara

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