Patent
1996-11-19
1998-12-22
Bowler, Alyssa H.
395412, 395413, 395415, 395416, 395417, 395418, 395419, 395410, G06F 1210
Patent
active
058527389
ABSTRACT:
A method for managing a memory address space in a memory system, the memory system having multiple block address translation entries, each entry defining a portion of the memory address space, including the steps of determining that a received virtual address references a portion of the memory address space not defined by any of the block address translation entries, reallocating at least one of the block address translation entries to define a portion of the memory address space including the received virtual address, and providing a physical address matching the virtual address by using the reallocated block address translation entries. In addition, an apparatus for managing a memory address space in a memory system, the memory system having multiple block address translation entries, each entry defining a portion of the memory address space, including apparatus for determining that a received virtual address references a portion of the memory address space not defined by any of the block address translation entries, apparatus for reallocating at least one of the block address translation entries to define a portion of the memory address space including the received virtual address, and apparatus for providing a physical address matching the virtual address by using the reallocated block address translation entries.
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Bealkowski Richard
Cronk Doyle Stanfill
Grimes Benjamin Russell
Turner Michael Robert
Bowler Alyssa H.
Drake Paul S.
Emile Volel
International Business Machines - Corporation
Nguyen Dzung C.
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