Patent
1994-07-25
1998-10-06
Lane, Jack A.
395419, 39549704, G06F 1208
Patent
active
058190619
ABSTRACT:
In a partitioned process environment, storage is reassigned by a shuffle of guest absolute address spaces which may be reassigned among partitions without restriction as to the position of the space to be reassigned relative to the position of the partition to which it is to be assigned. The reassignment is accomplished by adjusting the origin addresses by an adjustment value corresponding to the size of the address space of an additional memory area to be added to a selected partition. Furthermore, the size of the address space of the selected partition is increased by the same adjustment value. The system employs duplicated origin and limit arrays which are used to convert from a partition (guest) absolute address to a system (host) absolute address and uses duplicated configuration arrays by which the system absolute addresses are converted to physical memory addresses. Revised origin and limit information and configuration information is stored in an origin and limit array in the stand by state and in a configuration array in the stand by state. Autonomously operating circuitry is responsive to control signals to temporarily suspend memory commands from the input-output system, to reconfigure the origin and limit arrays and the configuration arrays to enable the system to use the revised information and, thereafter, to resume the processing of memory commands from the input-output system.
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IBM, "Processor Resource/Systems Manager Planning Guide" GA22-7123-10 Published Aug. 1993.
Capowski Robert Stanley
Christensen Neal Taylor
Cox Frederick J.
Curlee, III Thomas Oscar
Glassen Steven Gardner
Augspurger Lynn L.
International Business Machines - Corporation
Lane Jack A.
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