Electric lamp and discharge devices: systems – Plural power supplies – Plural cathode and/or anode load device
Reissue Patent
1997-06-06
2001-03-06
Shingleton, Michael B (Department: 2817)
Electric lamp and discharge devices: systems
Plural power supplies
Plural cathode and/or anode load device
C315S169300, C313S585000, C313S586000
Reissue Patent
active
RE037083
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method and an apparatus for driving a surface discharge plasma display panel, and more particularly, to a method and an apparatus for driving a three-electrode surface-discharge alternating-current plasma display panel (AC PDP).
2. Description of the Related Art
Recently, flat display panels such as AC PDPs are required to have large screens, large capacity, and the ability to display full-color images. In particular, the AC PDPs are required to provide more display lines and intensity levels and stably rewrite their screens without decreasing the luminance of the screens.
Conventionally, a line-by-line self-erase addressing method for driving the PDP is proposed. In the prior art driving method, wall charges (which are charges caused on the surface of the wall) remain during the reset period, and decrease the address discharge. Fluctuations in the remnant wall charges narrow the range of the potential for securing the stable operation of the PDP under various conditions. The fluctuations also change an optimum value of the potential, to destabilize the operation of the PDP or lower the display quality thereof.
Further, in another prior art driving method, for example, 256 shades of gray can be realized by dividing a frame into eight sub-fields (which are disclosed in, for example, Japanese Unexamined Patent Publication (Kokai) No. 4-195188 and Japanese Patent Application No. 4-340498). In this driving method, two to three times of discharge should be carried out in the reset period, to uniformly distribute wall charges and secure stable operation. However, the discharge produces light even when displaying black, and thus the contrast of PDP is deteriorated. Note that the related art and the problems thereof will be briefly explained later.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a method and an apparatus for driving a surface discharge plasma display panel with a wide range of voltages for causing address discharge, to improve the display quality of the panel. Further, another object of the present invention is to provide a method and an apparatus for driving a surface discharge plasma display panel that displays black with low luminance, to improve the display quality of the panel.
According to the present invention, there is provided a method of driving a surface discharge plasma display panel having a first substrate, first and second electrodes arranged in parallel with each other on the first substrate and paired for respective display lines, a second substrate spaced apart from and facing the first substrate, third electrodes arranged on the first or second substrate away from and orthogonal to the first and second electrodes, wherein the method comprises a reset step of applying a pulse of a first voltage to the paired first and second electrodes; a write step of applying a pulse of a second voltage to the second and third electrodes corresponding to cells to be turned ON; and a sustain discharge step of applying an AC pulse of a fourth voltage to the paired first and second electrodes, wherein the pulse of the first voltage being so set that it is higher than a first discharge start voltage, a third voltage caused by the discharge is higher than the first discharge start voltage, and the first, second, and third electrodes have the same potential after the application of the pulse of the first voltage.
The plasma display panel may have a wall charge accumulating dielectric layer covering the surfaces of the first and second electrodes, a phosphor formed over the second substrate, a discharge gas sealed in a cavity defined between the first and second substrates, and cells formed at intersections where the first and second electrodes cross the third electrodes; the reset step may be used to cause discharge between the first and second electrodes and uniformly distribute charges over the dielectric layer; the write step may be used to cause discharge between the second and third electrodes, so that predetermined quantities or more of first and second wall charges of opposite polarities are accumulated on the dielectric layer on the first and second electrodes, respectively, in the cells to be turned ON; the sustain discharge step may be used to turn ON the cells in which the sum of the third voltage between the first and second wall charges and the fourth voltage having the same polarity as the third voltage exceeds a first discharge start voltage, and to alternate the opposite polarities of the first and second wall charges; and the reset step, the write step, and the sustain discharge step may be repeatedly carried out, so that the polarity of the AC pulse in the sustain discharge step is opposite to that of the pulse of the first voltage in the reset step. An erase pulse that is lower than the first discharge start voltage and gently rises may be applied to the first and second electrodes after the application of the pulse of the first voltage during a reset period, to add the voltage of the erase pulse to the first and second wall charges that have not been erased by the pulse of the first voltage due to abnormalities in the cells, thereby discharging and erasing the remnant wall charges.
The polarities of the first and second wall charges that have not been erased by the pulse of the first voltage due to abnormalities in the cells may be integrated and amplified by applying a pulse that is lower than the first discharge start voltage and has an opposite polarity to the first voltage as well as a pulse that is lower than the first discharge start voltage and has the same polarity as the first voltage to the first and second electrodes in an interval between the pulse of the first voltage and the erase pulse, and wherein the polarity of the erase pulse may be inverted with respect to the polarity of the first voltage, thereby erasing more of the remnant wall charges with the erase pulse.
The potential of the third electrodes may be substantially equal to the average of the potential of the first and second electrodes during the application of the pulse of the first voltage. The pulse of the first voltage may be generated by setting the second electrodes to a ground level and by applying a pulse of a positive voltage to the first electrodes. The potential of the third electrodes may be set to a ground level during the application of the pulse of the first voltage.
The potential of the first, second, and third electrodes may be at the ground level before and after the application of the pulse of the first voltage. In the write step, the second voltage may be greater than a second discharge start voltage between the second and third electrodes, and a pulse of a fifth voltage Vs may be applied to the first and second electrodes, where “Vsmin<=Vs<Vfxymin,” Vsmin is a functional minimum for the fourth voltage, and Vfxymin is the first discharge start voltage. The fifth voltage may be close to the first discharge start voltage. The width of the pulse of the second voltage may be narrower than that of the pulse of the fifth voltage.
The pulse of the second voltage may be a positive pulse applied to the third electrodes when the potential of the second electrodes is negative with respect to the ground level and the third electrodes are at the ground level; and the pulse of the fifth voltage may be a negative pulse applied to the second electrodes when the potential of the first electrodes is equalized with the potential of the third electrodes. The potential of the second electrodes may be about ¼ to ¾ of the fifth voltage.
The potential of the third electrodes may be positive with respect to the ground level in the sustain discharge step. A positive pulse whose potential difference with respect to the third electrodes is about ¼ to ¾ of the fourth voltage may be simultaneously applied to the first and second electrodes before the first pulse of the fourth voltage is applied in the sustain discharge step. An outpu
Fujitsu Limited
Shingleton Michael B
Staas & Halsey , LLP
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