Amplifiers – With semiconductor amplifying device – Integrated circuits
Reexamination Certificate
2006-06-20
2006-06-20
Choe, Henry (Department: 2817)
Amplifiers
With semiconductor amplifying device
Integrated circuits
C330S296000
Reexamination Certificate
active
07064615
ABSTRACT:
Apparatus and methods are described for biasing amplifiers with multiple outputs. A semiconductor die may include a reference Field Effect Transistor (FET) integrated on the semiconductor die and coupled to an amplifier integrated on the semiconductor die. A voltage offset circuit may also be integrated on the semiconductor die for determining the voltage needed to operate the amplifier.
REFERENCES:
patent: 2210028 (1940-08-01), Doherty
patent: 4074181 (1978-02-01), Crowle
patent: 5420541 (1995-05-01), Upton et al.
patent: 5739723 (1998-04-01), Sigmon et al.
patent: 5757229 (1998-05-01), Mitzlaff
patent: 6046642 (2000-04-01), Brayton et al.
patent: 6097252 (2000-08-01), Sigmon et al.
patent: 6262629 (2001-07-01), Stengel et al.
patent: 6731173 (2004-05-01), Thompson
patent: 2003/0141933 (2003-07-01), Pengelly
Krvavac Enver
Mitzlaff James E.
Van Horn Mark I.
Choe Henry
Freescale Semiconductor Inc.
Fulbright & Jaworski LLP
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