Method and apparatus for digital multiplication based on sums an

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364754, G06F 752

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active

054023696

ABSTRACT:
A method and apparatus is disclosed for digital multiplication based on sums and differences of finite sets of powers of two. It is observed that for a given multiplicand signal A, multiples of the form A.multidot.P/Q can be defined by adding or subtracting term signals when each term signal (T.sub.i,T.sub.j) is selectively made representative either of the multiplicand (A) multiplied by a power of two (T=A*2.sup.-i) or representative of a nullity (T=0*A). A mapping unit is provided for controlling responsive barrel shifters and for controlling one or more responsive adder/subtractor units so that the resultant system has a transfer function equivalent to that of an n-bits by m-bits multiplier.

REFERENCES:
patent: 4864529 (1989-09-01), Shah et al.
patent: 5001663 (1991-03-01), Parulski et al.
patent: 5117385 (1992-05-01), Gee
patent: 5243552 (1993-09-01), Asakura

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