Method and apparatus for digital encoding and decoding

Coded data generation or conversion – Digital code to digital code converters – To or from number of pulses

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341 59, 341 63, 341 67, 358260, H03M 740

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active

048412996

ABSTRACT:
Encoding and decoding method and apparatus are disclosed including a decoder for decoding a stream of encoded digital data words which have been encoded by an encoder using variable length code words in which the code words comprise a single group of 0 bits followed by a single group of 1 bits. The 0 bits and 1 bits are separately counted (46), and the combined counts are used to address a read only memory (54) containing the decoded digital data words. The decoded digital data word is read out from the addressed memory location. Also disclosed is an AND gate array 70 of rows and columns of AND gates (90-1 etc.), in which the number of 0s in the code word determines which row is energized, and the number of 1s in the code word determines which column is energized. The energized AND gate is indicative of the decoded digital data word.

REFERENCES:
patent: 3560639 (1971-02-01), Centanni
patent: 4396906 (1983-08-01), Weaver
W. R. McCray, Translating a Variable-Length Code/IBM Technical Disclosure Bulletin, Apr. 1975, vol. 17, No. 11, pp. 3328-3329.
Eugene R. Hnatek, A User's Handbook of D/A and A/D Converters, 1976, pp. 361-363.
Ripley et al., "Pro. Comput. Cariol.", 1976, pp. 439-445.
Ruttimann et al., "IEEE Transactions on Biomedical Engineering", vol. BME-26, No. 11, Nov. 1979, pp. 613-623.
Atrubin, "IBM Technical Disclosure Bulletin", vol. 14, No. 3, Aug. 1971, pp. 874-876.
Miessler, "IBM Technical Disclosure Bulletin", vol. 17, No. 5, Oct. 1974, pp. 1489-1491.

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