Method and apparatus for determining the timing of an...

Details Method and apparatus for determining the timing of an... Method and apparatus for determining the timing of an...

2011-07-19

2011-07-19

Chiang, Jack (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Integrated circuit design processing

Physical design processing

Reexamination Certificate

active

07984405

ABSTRACT:
A system that determines the timing of an integrated circuit (IC) design is presented. During operation, the system receives a netlist for the IC design, wherein the netlist specifies the placement of cells within the IC design. Next, the system estimates capacitances for cells within the IC design based on analytic models of the cells. The system then estimates the post-physical-optimization timing of the IC design based on the netlist, the capacitances, and the analytic models, wherein the post-physical-optimization timing is estimated without performing physical optimization.

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