Method and apparatus for determining IDDQ

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

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324769, G01R 3126

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active

057899339

ABSTRACT:
IDDQ of an integrated circuit is rapidly measured with system test equipment providing sampled pass/fail outputs. A switch couples the power supply to the integrated circuit and another switch returns a sense signal input to the integrated circuit such that the power may be interrupted to measure the decay of the voltage across the integrated circuit. A monitor signal output is coupled to the integrated circuit to enable monitoring of the voltage decay. At least one processor, which periodically samples the voltage signal, compares the magnitude of the voltage signal at the time of each said periodic sample to a predetermined reference signal, indicates a voltage signal less than the reference signal and calculates the IDDQ based upon the number of periodic samples from the time power is removed from the integrated circuit and the voltage of the reference signal.

REFERENCES:
patent: 5519333 (1996-05-01), Righter
patent: 5552744 (1996-09-01), Burlison et al.
patent: 5557620 (1996-09-01), Miller, Jr. et al.
"A General Purpose IDDQ Measurement Circuit", by: Kenneth M. Wallquist, Alan W. Righter, and Charles F. Hawkins, Aug. 1993, IEEE, Paper 31.3, International Test Conference 1993, pp. 642-651.
"Achieving IDDQ/ISSQ Production Testing With QuiC-Mon", by: Kenneth M. Wallquist -Philips Semiconductor, 1995, IEEE, IEEE Design & Test of Computers, pp. 62-69. Month unavailable.
"A New Approach To Dynamic IDD Testing", by: Mike Keating, GerRAd Inc, & Dennis Meyer, Catec Inc., 1987, IEEE, 1987 International Test Conference, Paper 13.3, pp. 316-321, Feb. 1987.
"HP83000 Digital IC Test System--F330 User Training, Model F330", by: Hewlett-Packard Company, Printed in the Federal Republic of Germany, Sep. 1994, Revision 0.95.

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