Data processing: software development – installation – and managem – Software program development tool – Testing or debugging
Reexamination Certificate
2011-07-26
2011-07-26
Yigdall, Michael J (Department: 2192)
Data processing: software development, installation, and managem
Software program development tool
Testing or debugging
C717S128000, C714S030000, C712S227000
Reexamination Certificate
active
07987453
ABSTRACT:
A method, apparatus, and computer instructions for determining computer flows autonomically using hardware assisted thread stack and cataloged symbolic data. When a new thread is spawned during execution of a computer program, new thread work area is allocated by the operating system in memory for storage of call stack information for the new thread. Hardware registers are set with values corresponding to the new thread work area. Upon context switch, values of the registers are saved in a context save area for future restoration.When call stack data is post-processed, the operating system or a device driver copies call stack data from the thread work areas to a consolidated buffer and each thread is mapped to a process. Symbolic data may be obtained based on the process identifier and address of the method/routine that was called/returned in the thread. Corresponding program flow is determined using retrieved symbolic data and call stack data.
REFERENCES:
patent: 4291371 (1981-09-01), Holtey
patent: 5103394 (1992-04-01), Blasciak
patent: 5555432 (1996-09-01), Hinton et al.
patent: 5590352 (1996-12-01), Zuraski et al.
patent: 5652858 (1997-07-01), Okada et al.
patent: 5691920 (1997-11-01), Levine et al.
patent: 5761103 (1998-06-01), Oakland et al.
patent: 5774724 (1998-06-01), Heisch
patent: 5805879 (1998-09-01), Hervin et al.
patent: 5822790 (1998-10-01), Mehrotra
patent: 5875294 (1999-02-01), Roth et al.
patent: 5913925 (1999-06-01), Kahle et al.
patent: 5930508 (1999-07-01), Faraboschi et al.
patent: 5937437 (1999-08-01), Roth et al.
patent: 5938778 (1999-08-01), John, Jr. et al.
patent: 5966537 (1999-10-01), Ravichandran
patent: 5987250 (1999-11-01), Subrahmanyam
patent: 6070009 (2000-05-01), Dean et al.
patent: 6073109 (2000-06-01), Flores et al.
patent: 6098169 (2000-08-01), Ranganathan
patent: 6101524 (2000-08-01), Choi et al.
patent: 6105051 (2000-08-01), Borkenhagen et al.
patent: 6105129 (2000-08-01), Meier et al.
patent: 6134676 (2000-10-01), VanHuben et al.
patent: 6145077 (2000-11-01), Sidwell et al.
patent: 6149318 (2000-11-01), Chase et al.
patent: 6185671 (2001-02-01), Pentovski et al.
patent: 6189141 (2001-02-01), Benitez et al.
patent: 6192513 (2001-02-01), Subrahmanyam
patent: 6199204 (2001-03-01), Donohue
patent: 6202207 (2001-03-01), Donohue
patent: 6206584 (2001-03-01), Hastings
patent: 6223338 (2001-04-01), Smolders
patent: 6243804 (2001-06-01), Cheng
patent: 6247113 (2001-06-01), Jaggar
patent: 6256775 (2001-07-01), Flynn
patent: 6286132 (2001-09-01), Tanaka et al.
patent: 6324689 (2001-11-01), Lowney et al.
patent: 6330662 (2001-12-01), Patel et al.
patent: 6351844 (2002-02-01), Bala
patent: 6374364 (2002-04-01), McElroy et al.
patent: 6381679 (2002-04-01), Matsubara et al.
patent: 6430741 (2002-08-01), Mattson, Jr. et al.
patent: 6442585 (2002-08-01), Dean et al.
patent: 6446029 (2002-09-01), Davidson et al.
patent: 6460135 (2002-10-01), Suganuma
patent: 6480938 (2002-11-01), Vondran, Jr.
patent: 6539458 (2003-03-01), Holmberg
patent: 6549930 (2003-04-01), Chrysos et al.
patent: 6598153 (2003-07-01), Flachs et al.
patent: 6647301 (2003-11-01), Sederlund et al.
patent: 6654781 (2003-11-01), Browning
patent: 6658416 (2003-12-01), Hussain et al.
patent: 6687794 (2004-02-01), Malik
patent: 6721875 (2004-04-01), McCormick et al.
patent: 6735666 (2004-05-01), Koning
patent: 6782454 (2004-08-01), Damron
patent: 6842850 (2005-01-01), Ganapathy et al.
patent: 6848029 (2005-01-01), Coldewey
patent: 6865666 (2005-03-01), Yoshida et al.
patent: 6871298 (2005-03-01), Cavanaugh et al.
patent: 6928521 (2005-08-01), Burton et al.
patent: 6944720 (2005-09-01), Sperber et al.
patent: 6973417 (2005-12-01), Maxwell et al.
patent: 6973542 (2005-12-01), Schmuck et al.
patent: 6988186 (2006-01-01), Eickemeyer et al.
patent: 7024668 (2006-04-01), Shiomi et al.
patent: 7035996 (2006-04-01), Woodall et al.
patent: 7207043 (2007-04-01), Blythe et al.
patent: 7237242 (2007-06-01), Blythe et al.
patent: 2001/0032305 (2001-10-01), Barry
patent: 2002/0010733 (2002-01-01), Baba et al.
patent: 2002/0019976 (2002-02-01), Patel et al.
patent: 2002/0124237 (2002-09-01), Sprunt et al.
patent: 2002/0129309 (2002-09-01), Floyd et al.
patent: 2002/0147965 (2002-10-01), Swaine et al.
patent: 2002/0199179 (2002-12-01), Lavery et al.
patent: 2003/0041096 (2003-02-01), Johnson
patent: 2003/0126590 (2003-07-01), Burrows et al.
patent: 2004/0153612 (2004-08-01), Mutz et al.
patent: 2004/0216104 (2004-10-01), Fluhr et al.
patent: 2004/0216105 (2004-10-01), Burky et al.
patent: 2005/0091456 (2005-04-01), Huck
patent: 2005/0102673 (2005-05-01), DeWitt et al.
patent: 2005/0108483 (2005-05-01), Bungo
patent: 2005/0177822 (2005-08-01), Kuch et al.
patent: 2005/0257092 (2005-11-01), Alexander et al.
patent: 2000029731 (1999-12-01), None
patent: 2000347863 (2000-12-01), None
“Method for the dynamic prediction of nonsequential memory accesses”, Sep. 25, 2002, pp. 1-4, ip.com IPCOM000009888D.
“Cache Miss Director—A Means of Prefetching Cache Missed Lines”, Aug. 1, 1982, IBM Technical Disclosure Bulletin, vol. 25, Issue 3A, pp. 1286.
Tanenbaum, “Structured Computer Organization”, Prentice Hall, 1984, pp. 10-12.
Kikuchi, “Parallelization Assist System”, Joho Shori, vol. 34, No. 9, Sep. 1993, pp. 1158-1169.
Cohen et al., “Hardware-Assisted Characterization of NAS Benchmarks”, Cluster Computing, vol. 4, No. 3, Jul. 2001, pp. 189-196.
Talla et al., “Evaluating Signal Processing and Multimedia Applications on SIMD, VLIW and Super Scalar Architectures”, International Conference on Computer Design, Austin, Sep. 17-20, 2000, pp. 163-172.
Iwasawa et al., “Parallelization Method of Fortran DO Loops by Parallelizing Assist System”, Transactions of Information Processings Society of Japan, vol. 36, No. 8, Aug. 1995, pp. 1995-2006.
Talla et al., “Execution Characteristics of Multimedia Applications on a Pentium II Processor”, IEEE International Performance, Computing, and Communications Conference, 19th, Phoenix, Feb. 20-22, 2000, pp. 516-524.
IBM Research Disclosure Bulletin 444188, “Enable Debuggers as an Objective Performance Measurement Tool for Software Development Cost Reduction”, Apr. 2001, pp. 686-688.
U.S. Appl. No. 09/435,069 AT9-99-491, filed Nov. 4, 1999, Davidson et al., Method and Apparatus for Instruction Sampling for Performance Monitoring and Debug.
U.S. Appl. No. 08/538,071, filed Oct. 2, 1995, Gover et al., Method and System for Selecting and Distinguishing an Event Sequence using an Effective Address in a Processing System.
U.S. Appl. No. 10/675,777, filed Sep. 30, 2003, DeWitt, Jr. et al., Method and Apparatus for Counting Instruction Execution and Data Accesses.
U.S. Appl. No. 10/674,604, filed Sep. 30, 2003, Levine et al., Method and Apparatus for Selectively Counting Instructions and Data Accesses.
U.S. Appl. No. 10/675,831, filed Sep. 30, 2003, DeWitt, Jr. et al., Method and Apparatus for Generating Interrupts Upon Execution of Marked Instructions and Upon Access to Marked Memory Locations.
U.S. Appl. No. 10/675,778, filed Sep. 30, 2003, DeWitt, Jr. et al., Method and Apparatus for Counting Data Accesses and Instruction Executions that Exceed a Threshold.
U.S. Appl. No. 10/675,776, filed Sep. 30, 2008, DeWitt, Jr. et al., Method and Apparatus for Counting Execution of Specific Instructions and Accesses to Specific Data Locations.
U.S. Appl. No. 10/675,751, filed Sep. 30, 2003, DeWitt, Jr. et al., Method and Apparatus for Debug Support for Individual Instructions and Memory Locations.
U.S. Appl. No. 10/675,721, filed Sep. 30, 2003, Levine et al., Method and Apparatus to Autonomically Select Instructions for Selective Counting.
U.S. Appl. No. 10/674,642, filed Sep. 30, 2003, Levine et al., Method and Apparatus to Autonomically Count Instruction Execution for Applications.
U.S. Appl. No. 10/674,606, filed Sep. 30, 2003, Levine et al., Method and Apparatus to Autonomically Take an Exception on Specified Instructions.
U.S. Appl. No. 10/675,783, filed Sep. 30, 2003, Lev
DeWitt, Jr. Jimmie Earl
Levine Frank Eliot
Richardson Christopher Michael
Urquhart Robert John
International Business Machines - Corporation
Mims Jr. David A.
Wang Ben C
Yee & Associates P.C.
Yigdall Michael J
LandOfFree
Method and apparatus for determining computer program flows... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for determining computer program flows..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for determining computer program flows... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2698692