Method and apparatus for detecting oscillator stuck faults in a

Details Method and apparatus for detecting oscillator stuck faults in a Method and apparatus for detecting oscillator stuck faults in a

1989-11-13

1990-11-20

Eisenzopf, Reinhard J.

Excavating

324158R, 371 61, G01R 3128

Patent

active

049724142

ABSTRACT:
A method and apparatus for identifying stuck faults in an oscillator used for providing an oscillator input signal to an integrated circuit chip of the type conforming to a Level Sensitive Scan Design (LSSD) system and testing technique. A pair of shift register latches (SRLs) are providing in the integrated circuit chip having a logical one signal applied to a data input of the SRLs. The oscillator input signal is applied to a data clock input of a first one of the SRLs and an inverted oscillator input signal is applied to the data clock input of a second one of the SRLs. Then the scan data output (SDO) of the test SRLs is detected responsive to the applied oscillator and inverted oscillator input signals to identify a stuck fault.

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