Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle – Analysis and verification
Reexamination Certificate
2011-05-17
2011-05-17
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Design of semiconductor mask or reticle
Analysis and verification
C716S111000, C716S112000, C716S136000
Reexamination Certificate
active
07945870
ABSTRACT:
Method for detecting hotspots in a circuit layout includes constructing a layout graph having nodes, corner edges and proximity edges from the circuit layout, converting the layout graph to a corresponding dual graph, and iteratively selecting edges and nodes having weights greater than a predetermined threshold value at each iteration as hotspots.
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Kahng Andrew B.
Park Chul-Hong
Xu Xu
Greer Burns & Crain Ltd.
Siek Vuthe
The Regents of the University of California
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