Method and apparatus for detecting errors in a transmitted code

Details Method and apparatus for detecting errors in a transmitted code Method and apparatus for detecting errors in a transmitted code

1978-05-11

1980-02-19

Malzahn, David H.

Communications: electrical

Digital comparator systems

G06F 1112

Patent

active

041897102

ABSTRACT:
In code transmission, an information bit has added thereto a first redundant bit which is not evenly divisible by a generation polynomial expression even when all of the information bits are "0" or "1". The code, including the information bits and the first redundant bit, is divided by the generation polynomial expression to provide a second redundant bit as the residue of such division, which is added to the information bit to provide a resultant code which is transmitted. The first redundant bit is added to the received code, which is then divided by the generation polynomial expression to detect the introduction of an error in the transmission path by the existence of a residue of the last division.
An apparatus for accomplishing the above includes a dividing circuit consisting of a shift register having modulo 2 type adding circuits inserted between its adjacent stages in correspondence with constants of a generation polynomial expression and feedback paths extending from the shift register output to the adding circuits, a circuit for adding or presetting the first redundant bit in the shift register stage of the dividing circuit to which an information bit is applied, a circuit for providing the second redundant bit as the residue of a code, divided by the generation polynomial expression, and a circuit for adding the second redundant bit to the information bit, thereby providing the code to be transmitted.

REFERENCES:
patent: 3475724 (1969-10-01), Townsend et al.
patent: 3544963 (1970-12-01), Tong
patent: 3638182 (1972-01-01), Burton et al.
patent: 4077028 (1978-02-01), Lui et al.

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