Method and apparatus for detecting cursors

Details Method and apparatus for detecting cursors Method and apparatus for detecting cursors

1989-08-25

1992-04-21

Weldon, Ulysses

Communications: electrical

Land vehicle alarms or indicators

Internal alarm or indicator responsive to a condition of the...

340706, 340724, 340799, G09G 302

Patent

active

051072513

ABSTRACT:
Apparatus and methods are disclosed which are most advantageously used with a digital computer for detecting the location of multiple cursors in a computer memory having parity bits. In one embodiment of the present invention, the normal parity checking scheme of the computer memory is modified, such that the parity bit is used to detect data locations containing cursor data. Writing new data to the frame buffer is implemented as a read-modified-write cycle. In another embodiment of the present invention, the parity checking of the computer memory is no longer used as such. Instead, the memory controller has a mode that forces the parity bit to one of two states, independent of the contents of the data location. Rather than writing to the frame buffer as a read-modify-write cycle, the memory controller detects the location of the cursor by reading the state of the parity bit while writing the contents of the data location associated with the parity bit. As a result of implementing the present invention, the CPU spends less time manipulating the cursors while maintaining a high frame buffer access bandwidth.

REFERENCES:
patent: 4405830 (1983-09-01), Foster et al.
patent: 4625202 (1986-11-01), Richmond et al.
patent: 4668947 (1987-05-01), Clarke, Jr. et al.
patent: 4734689 (1988-03-01), Kurakake
I. D. Judd et al., "Microprocessor-Controlled Cursors," IBM Technical Disclosure Bulletin, vol. 22, No. 5, Oct. 1979, pp. 2103-2105.

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