Method and apparatus for detecting clock gating...

Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Power system

Reexamination Certificate

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C703S015000, C712S029000, C713S322000, C713S323000, C713S324000

Reexamination Certificate

active

08073669

ABSTRACT:
A pipeline electronic circuit and design methodology enables power conservation in the stages of the pipeline via a simulation that identifies clock-gating opportunities among the stages of the pipeline. In one embodiment, simulation results assist a designer in the design of the pipeline electronic circuit to achieve power conservation by incorporating clock-gating circuitry among the stages of the pipeline at clock gating opportunity locations that the simulation identifies.

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