Method and apparatus for detecting an IC defect using a charged

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

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Details

324501, 364579, 250310, G01R 7126

Patent

active

055215173

ABSTRACT:
The present invention allows to automatically presume a defect location of an IC using an EB tester. Under each of the conditions where a normal power supply voltage and an abnormal power supply voltage are applied to an IC respectively, test patterns are applied to the IC until the pattern address where the first defect is detected by an IC tester. At this point in time, the pattern update is stopped. Then a potential contrast image data is acquired from one of the partitioned segments of the IC surface for each of the above power supply conditions. A diffrence image data between the two potential contrast image data (normal power case and abnormal power case) is generated. This difference image data generation is repeated several times and those defference image data are summed up. A check is made to see if there is a changed portion greater than a predetermined value in each of the segments and if there is, a defect information is stored in a storage portion corresponding to the defect segment. The summed difference image data is acquired from each of all the segments of the IC and then the stop pattern address is decrementsd by one and the same process is repeated. Above process is repeated until no defect segment is detected by decrementing the number of test patterns. When only one segment having a defect is detected, the segment is considered as a real defect segment.

REFERENCES:
patent: 5404110 (1995-04-01), Golladay et al.

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