Demodulators – Phase shift keying or quadrature amplitude demodulator
Reexamination Certificate
2003-02-28
2004-08-24
Kinkead, Arnold (Department: 2817)
Demodulators
Phase shift keying or quadrature amplitude demodulator
C329S309000, C375S329000, C375S345000, C375S298000
Reexamination Certificate
active
06781448
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a demodulator and a demodulating method using a quasi-synchronous detection.
2. Description of the Related Art
A configuration of a conventional QAM (quadrature amplitude modulation) demodulator
50
is shown in FIG.
1
.
The demodulator
50
includes a quadrature detector
1
for converting an intermediate frequency signal (IF), that is an inputted modulated signal, into two quadrature signals Ich and Qch, an oscillator
2
for transmitting periodical signals to the quadrature detector
1
, low pass filters
3
and
4
for removing a high frequency component from the output of the quadrature detector
1
and taking out only the required quadrature component signals, amplifiers
5
and
6
for amplifying the quadrature signals Ich and Qch supplied from the low pass filters
3
and
4
to amplitudes large enough for reception by analog-to-digital (A/D) converters, A/D converters
7
and
8
for converting the two analog quadrature signals Ich and Qch into digital signals, an automatic gain control (AGC) circuit
9
for controlling the amplitude of either one of the two quadrature signals Ich and Qch supplied from the A/D converters
7
and
8
, a phase-rotator
10
for rotating the phases of the two quadrature signals Ich and Qch supplied from the AGC circuit
9
, and amplitude adjustors
11
and
12
for adjusting the amplitudes of the two quadrature signals Ich and Qch supplied from the phase-rotator
10
to prescribed amplitudes.
Supposing that the difference in gains between the two quadrature signals Ich and Qch arising in the analog section (the quadrature detector
1
, the low pass filters
3
and
4
, the amplifiers
5
and
6
, and the A/D converters
7
and
8
) is not corrected, the demodulated output will be affected and signal points around will expand as shown in
FIG. 2
, inviting a deterioration in error rate characteristic.
In order to prevent this, the demodulator
50
shown in
FIG. 1
is provided with the AGC circuit
9
. This AGC circuit
9
detects the relative amplitude levels of the two quadrature signals Ich and Qch, and cancels the gain difference arising in the analog section by controlling the amplitude of the quadrature signal Ich according to the result of detection.
A first typical configuration
9
A of the AGC circuit
9
is shown in FIG.
3
.
The AGC circuit
9
A shown in
FIG. 3
consists of a multiplier
27
, a low pass filter
28
, a comparator
29
and first and second absolute value circuits
30
and
31
.
The first absolute value circuit
30
figures out the absolute value, i.e. the amplitude, of the quadrature signal Ich, and the second absolute value circuit
31
figures out the absolute value, i.e. the amplitude, of the quadrature signal Qch. The amplitudes of the two quadrature signals Ich and Qch figured out by the first and second absolute value circuits
30
and
31
are outputted to the comparator
29
, which compares these two amplitudes. The low pass filter
28
integrates signals indicating the result of comparison, supplied by the comparator
29
, into a control signal and transmits this control signal to the multiplier
27
. The multiplier
27
corrects the quadrature signal Ich by multiplying the quadrature signal Ich by this control signal.
However, this involves the following problem.
The problem with this AGC circuit
9
A is that it cannot exercise proper control if receive signals are under specific conditions.
This problem arises because, in the AGC circuit
9
A, the comparator
29
compares the quadrature signals Ich and Qch at the same point of time. In a PSK operation or a QAM operation, the two quadrature signals Ich and Qch cannot take respectively independent values, therefore once the value of the quadrature signal Ich is determined, the value of the other quadrature signal Qch is restricted to a prescribed range.
Supposing a QPSK operation, the values of the two quadrature signals Ich and Qch before the phase-rotator
10
are shown in FIG.
4
. Thus, the values that the quadrature signals Ich and Qch are limited to those on a circle
60
when the gain of the quadrature signal Ich is equal to that of the quadrature signal Qch, or to those on an oval
61
when the gain of the quadrature signal Ich is greater than that of the quadrature signal Qch.
In such a situation, comparing the amplitudes of the two quadrature signals Ich and Qch at the same point of time is equivalent to finding out which of areas A and B, having |Ich−Qch|=0 on the border between them, input signals will enter. In area A the amplitude of Ich is greater than that of Qch, while in area B the amplitude of Qch is greater than that of Ich.
Here is supposed a case in which the reception point is in a position shown in FIG.
5
.
If there is no difference in gain by the analog circuits between the two quadrature signals Ich and Qch, the numbers of signal points entering into area A will be equal to those of signal points entering into area B, therefore no control will be performed.
If the gain of Ich is greater than that of Qch, signal points will enter into area A, and control will be performed for reducing the gain of Ich.
If, conversely, the gain of Qch is greater than that of Ich, signal points will enter into area B, and control will be performed for raising the gain of Ich.
Thus, as shown in
FIG. 5
, if the reception points are in the vicinity of straight lines I=±Q, control will be performed correctly.
However, when receive signals come in the positions shown in
FIG. 6
, if data are equally distributed among four areas which are divided by two straight lines I=±Q, the numbers of signal points entering into areas A and B will be equal. Therefore, even if there is an amplitude difference between Ich and Qch, no control will be performed.
As described above, the problem with the AGC circuit
9
A shown in
FIG. 3
is that sometimes control is not performed correctly because the signals Ich and Qch at the same point of time are not independent each other.
In this connection, AGC circuits to solve this problem are also proposed. An AGC circuit
9
B shown in
FIG. 7
is one of them.
This AGC circuit
9
B includes a multiplier
32
, a low pass filter
33
, a comparator
34
, first and second averaging circuits
35
and
36
, and first and second absolute value circuits
37
and
38
.
As will be described below, this AGC circuit
9
B is so configured that it passes no judgment merely on the basis of a single symbol, but averages a certain number of signal points and controls on the basis of the average thereby obtained.
The first and second absolute value circuits
37
and
38
figure out respective amplitudes of the two quadrature signals Ich and Qch, and transmit the amplitudes figured out to the first and second averaging circuits
35
and
36
, respectively.
Each of the first and second averaging circuits
35
and
36
, upon receiving predetermined numbers of amplitudes, averages them and transmits the respective average amplitudes to the comparator
34
.
The comparator
34
compares these two averages. The low pass filter
33
integrates signals indicating the result of comparison, supplied from the comparator
34
, into a control signal, and transmits this control signal to the multiplier
32
. The multiplier
32
corrects the quadrature signal Ich by multiplying the quadrature signal Ich by this control signal.
The AGC circuit
9
B, as it can obtain amplitude information on the two quadrature signals Ich and Qch, can perform proper control in any situation.
However, if a circuit to supply N averages per symbol is to be configured for speeding up a control, all the values of N past inputs will have to be stored. If a large N value is set to improve the accuracy, the storage will be correspondingly increased. Therefore the scale of circuit will be vastly large.
FIG. 8
is a block diagram of another demodulator
51
according to the prior art.
The demodulator
51
shown in
FIG. 8
includes a first AGC circ
Dickstein Shapiro Morin & Oshinsky LLP.
Kinkead Arnold
NEC Corporation
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