Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices
Reexamination Certificate
2000-01-11
2002-07-02
Martin, David (Department: 2841)
Electricity: electrical systems and devices
Housing or mounting assemblies with diverse electrical...
For electronic systems and devices
C361S792000, C361S782000, C361S783000, C257S723000, C257S724000, C257S798000, C174S260000, C174S262000
Reexamination Certificate
active
06414850
ABSTRACT:
The present invention is directed to a method and apparatus for decoupling pins of a high density integrated circuit mounted on a circuit board and in particular to providing a method and system for providing decoupling capacitance with respect to power and/or ground pins of a ball grid array integrated circuit.
BACKGROUND INFORMATION
A number of fashions of mounting an integrated circuit to a printed circuit board have been used or proposed. One currently-used mounting procedure and device involves ball grid array (BGA) packaged integrated circuits (ICs) having a range of configurations such as packages with about 80 pins having a square footprint of 6 mm by 6 mm to packages having 256 or more pins, having a square footprint of about 15 mm by 15 mm or more. BGA's are often used with especially high pin count and/or high density integrated circuits. High pin count integrated circuit packages can contain, for example, 256 pins, 672 pins or more. The pins are relatively high density, in many embodiments such as providing as many as 256 pins in a relatively small area such as packages with a square footprint about 15 mm on each side or less.
Although ball grid array devices have been useful in electronic device fabrication, there are also certain disadvantageous aspects in current implementations of BGA devices. Typically, IC packages provide for at least some pins dedicated to supplying power, such as power pins and ground pins. In general, it is desired to provide capacitance for the power and ground pins, e.g. for decoupling purposes. Previous approaches, however, have generally used discrete decoupling capacitors which are placed a relatively large distance (such as more than about 2 mm, often more than about 5 mm), from the ICs' power and/or ground pins. This relatively-large spacing has been a function of many factors, including the fact that the discrete decoupling capacitors have previously been positioned outside the “footprint area” of the IC package and the fact that the power and ground pins generally are positioned in the inner rows of the package (i.e. closest to the die pad). Such relatively large spacing of the decoupling capacitors has several undesirable consequences. The relatively long copper tracks from the power and ground pins to the discrete capacitors creates an amount of wiring inductance. An increase in inductance can lower the resonant frequency of the decoupling capacitor, reducing the effectiveness of the decoupling capacitor. In some applications, reduction of the effectiveness of a decoupling capacitor can be detrimental to the operation of the device which the capacitor is attached to. In general, it is useful to facilitate reduction in power and ground supply noise by providing a relatively low-impedance path to the power and ground systems over a large frequency range and prior designs have made it difficult to provide such a low-impedance path. Accordingly, it would be useful to provide a method and apparatus for decoupling of power or other pins of an integrated circuit while avoiding a relatively large spacing from the pins to decoupling capacitors or other devices.
In addition to possible degrading of device performance, previous approaches of providing discrete decoupling capacitors have also been relatively expensive to implement. The process of placing and routing individual discrete capacitors can be time consuming and relatively expensive. Because of the need for positioning individual capacitors, there is little opportunity for cost savings arising from a standardization of pin placement, e.g. across multiple PCBs or across multiple IC packages on a single PCB. Accordingly, it would be useful to provide a decoupling for power or other pins of an integrated circuit while reducing board fabrication costs, e.g. compared to fabrication costs for providing discrete decoupling capacitors.
In typical prior BGA devices, the region of the PCB opposite the area of mounting of the BGA package (i.e. the portion of the circuit board which corresponds to the footprint of the BGA package, but is on the surface opposite the surface where the BGA package is mounted) was substantially unavailable for mounting other components. Accordingly, in many previous approaches, for a given size (surface area) of a BGA device, an area of twice that size (surface area) was unavailable for positioning discrete devices or circuitry. Accordingly, it would be useful to provide a method and apparatus which reduces the amount of surface area of the PCB which is rendered unavailable for mounting discrete components, circuitry and the like when a BGA device is coupled, i.e. which makes it feasible to position surface-mount or other discrete devices and/or circuitry in a region of the circuit board on the surface opposite to the surface a BGA is mounted, but within the footprint of the BGA package.
SUMMARY OF THE INVENTION
According to one aspect of the present invention, a small printed circuit board (PCB) or decoupling board is mounted on a surface of a PCB at least partially covering or intersecting the area of the footprint defined by the BGA package, but on the surface opposite to the surface where the BGA package is mounted. The small circuit board may be mounted to the main PCB in a number of fashions but, preferably, includes solder ball mounting. Preferably the small circuit board itself provides an amount of capacitance such as being or containing a layered capacitor, such as a multilayer capacitor structure. In one embodiment, multiple conductive layers are interleaved with multiple high-dielectric layers. If desired, two or more sets of conductive layers are coupled together, e.g. to form a set of power layers and a set of ground layers for respectively decoupling power and ground pins of the BGA device. Preferably the small circuit board can contain its own printed or other circuitry and/or may contain discrete components, e.g. surface mounted on the exterior surface of the small circuit board. By positioning the small circuit board within the footprint defined by the BGA package, the distance of copper or other conductive leads from the BGA power and ground (or other) pins to the decoupling capacitor can be relatively small such as about equal to the thickness of the main circuit board or less than the thickness of the main circuit board plus the thickness of the small circuit board and mounting components. It is believed that mounting of the small circuit board (preferably using solder ball mounting) is less time consuming and/or less expensive than positioning and mounting of discrete decoupling capacitors. Positioning discrete components or circuitry on or in the small circuit board effectively utilizes the space which is within the footprint defined by the BGA device but on or near the surface opposite where the BGA device is mounted.
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Kozak Frederic M.
Pomerleau Real Gislain
Bui Hung
Campbell III Samuel G.
Cisco Technology Inc.
Martin David
Skjerven Morrill LLP
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