Data processing: measuring – calibrating – or testing – Measurement system – Performance or efficiency evaluation
Reexamination Certificate
2007-11-20
2007-11-20
Ramos-Feliciano, Eliseo (Department: 2857)
Data processing: measuring, calibrating, or testing
Measurement system
Performance or efficiency evaluation
C702S057000, C702S087000
Reexamination Certificate
active
11118044
ABSTRACT:
The present invention includes a method and apparatus for decomposing and verifying configurable hardware. In one embodiment, the method includes automatically decomposing a set of one or more units at a first level of a configurable hardware system design hierarchy into a set of two or more units of a lower level of the hardware system design hierarchy. The set of one or more units at a first level includes one or more units dynamically instantiated at design creation time as well as at least a first unit composed of a previously instantiated hardware system composed with two or more levels of units within the hardware system design hierarchy of the previously instantiated hardware system.
REFERENCES:
patent: 5801956 (1998-09-01), Kawamura et al.
patent: 6701474 (2004-03-01), Cooke et al.
patent: 6816814 (2004-11-01), Ebert et al.
patent: 2002/0091979 (2002-07-01), Cooke et al.
patent: 2002/0161568 (2002-10-01), Sample et al.
patent: 2002/0171449 (2002-11-01), Shimizu et al.
patent: 2003/0067319 (2003-04-01), Cho
Thaker et al., “Register-Transfer Level Fault Modeling and Test Evaluation Techniques for VLSI Circuits”, ITC International Test Conference, 2000 IEEE, Paper 35.3, pp. 941-949.
VSI Alliance reference, “An Overview of VSIA” from http://www.vsi.org/aboutVSIA/index.htm, 2004, pp. 1 total.
Lin et al., “A Functional Test Planning System for Validation of DSP Circuits Modeled in VHDL”, 1998 International Verilog, pp. 172-177.
Evans et al., “Honey I Shrunk the SOC Verification Proablem”, Sonics, Inc., SNUG San Jose, 2001, 2001 pp. 11 total.
ALDEC, “What is TCL/TK Scripting?”, Jan. 2002, ALDEC Support, pp. 1-9.
PCT Notification of Transmittal of International Preliminary Examination Report for Int'l. Application No. PCT/US03/35336, Int'l Filing Date Nov. 5, 2003, mailed May 31, 2005, 5 pgs.
Ebert Jeffrey Allen
Evans Scott Carlton
Venugopalan Ravi
Blakely , Sokoloff, Taylor & Zafman LLP
Desta Elias
Ramos-Feliciano Eliseo
Sonics, Incorporated
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