Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Reexamination Certificate
1998-08-28
2003-03-18
Kizou, Hassan (Department: 2662)
Multiplex communications
Pathfinding or routing
Switching a message which includes an address header
C370S535000, C710S107000
Reexamination Certificate
active
06535519
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates generally to digital integrated circuits. More particularly, the present invention relates to a method and apparatus for data transfer within an integrated circuit. Even more particularly the present invention relates to a method an apparatus for transferring data between two blocks within an integrated circuit using only a data bus and a common clock signal.
2. Description of the Related Art
Rapid advances in silicon chip technology have resulted from progress made in both the “front end” of the chip manufacturing line, where circuit elements are fabricated, and the “back-end-of-line”, where the elements are wired into integrated circuits. The relentless drive toward increased circuit count and device speed has necessitated changes in back-end-of-line manufacturing technology. To accommodate decreasing transistor size, wiring pitch must be reduced, and to reap the benefit of increasing transistor speed, RC wiring delays must be contained. As a result, the fabrication of on-chip interconnections or “interconnects” has become difficult and costly with designers constantly striving to improve the performance of on-chip interconnections.
The speed of integrated circuits has increased so much that the propagation delay in the wires or interconnects is larger than the delay caused by a single gate. Consequently, there is a need for implementations that improve or minimize the interface between the various blocks of the integrated circuit in order to take advantage of the faster designs.
Data transfer between two blocks in an integrated circuit has typically been accomplished by sending an address from the block that needs the data to the block that contains the data. This address specifies the location of the data and is sent over an address bus that is separate from the data bus. The data is then sent by the block containing the data to the requesting block over the data bus. To indicate that the data has been sent, either a handshake signal is sent or the data is kept on the bus for a specified length of time. Obviously the address line introduces a considerable amount of wire delay into the integrated circuit. A delay is also caused by the validation of the data either through the sending of a handshake signal or holding the data on the bus for a specified length of time.
A need exists for a faster method of transferring data between two blocks in an integrated circuit. The improved method should minimize the number of interconnects or improve the performance of the interconnections in the integrated circuit so that the advantage of faster circuit elements may be realized. In addition, the improved method should minimize or eliminate the data validation that takes place using the current methods.
SUMMARY OF THE INVENTION
The present invention fulfills the need for faster data transfers by allowing for the transfer of data in an integrated circuit without the use of an address bus or the requirement of validating the data transfer using a handshake signal. A carousel register saves interface connections between blocks without impacting the number of gates and power consumption significantly. The carousel register allows two synchronous blocks using the same clock to share information without using an address bus. The block requesting data sends an enable signal to the carousel register in the block where the data is located. The enable signal serves the purposes of synchronizing the two blocks and activating the carousel register in the block where the data is contained. Data is rolled onto the bus through the use of a selector that is controlled by a counter connected to the enable signal. The requesting block then reads the appropriate data by using a counter to count the number of clocks from the time the carousel register is enabled. Upon reaching the appropriate clock cycle, the requesting block reads the data contained on the bus.
This method is obviously most useful when both of the blocks are aware of the stored order of the data and the data is not in a critical path. As an example, chips using the Open Host Controller Interface (OHCI) standard would benefit from the present invention. The OHCI specification is an industry standard whereby the operating system environment can communicate through a universal software driver instead of implementing an individualized driver for each particular piece of 1394 host silicon. Several descriptors are saved on the chip and the order is defined by the OHCI specification. Because these descriptors may be used by most blocks at any time, the descriptors are not timing critical and thus the chips are good prospects for the method of the present invention.
In an alternate embodiment, the carousel register may be implemented without the use of an enable signal by allowing the carousel register and the counter to operate at all times. Rather than use the enable signal to synchronize the two blocks, the counters in the two blocks can be synchronized with the carousel register by performing a reset in both blocks.
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Carstens Yee & Cahoon LLP
Kizou Hassan
LSI Logic Corporation
Pezzlo John
LandOfFree
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