Method and apparatus for data buffer management in a...

Multiplex communications – Pathfinding or routing – Switching a message which includes an address header

Reexamination Certificate

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Details

C370S429000, C370S229000, C370S413000, C370S417000, C709S235000, C710S052000, C710S053000, C710S054000, C710S056000, C710S057000

Reexamination Certificate

active

06539024

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
The invention relates generally to buffering of data and more particularly to a method and apparatus for buffering data cells in a communication switch.
BACKGROUND OF THE INVENTION
Data communication systems such as packet-based and cell-based communication systems send packets or cells of data through a network of switches. Each of the switches in the network is typically capable of receiving input data from a number of different sources and providing this input data to a number of different outputs. In doing so, the switch must be capable of buffering received data until it is possible to provide the data to the appropriate output via a data stream of limited bandwidth. In performing such buffering operations, prioritization schemes may be implemented in the buffers such that different classes of service can exist within the communications network. These prioritization schemes control the flow of buffered data into the limited bandwidth output stream.
In order to implement different prioritization schemes, it is desirable to monitor data waiting to be provided to an output of the communication switch, where the monitoring includes differentiation between data of varying levels of priority. In addition to priority, the input, or source, from which the data was received and the destination of the data may be monitored and taken into account when selecting data for output. Such prioritization based on input, output, and level of priority should be flexible in that as the needs of the communication system change, the prioritization scheme should be adaptable to suit the changing needs of the system.
Another consideration that should be addressed by buffering circuitry in a communication switch is the efficient use of available memory. As such, data having different levels of priority or data of other varying characteristics should have a controlled amount of storage space within the buffer. The buffer should also be able to accommodate the varying needs of the different data priority levels in terms of varied rates of data received. In other words, if a large amount of data having a specific priority level is received in sporadic large bursts, the buffering circuitry should be able to accommodate these large bursts. In order to accommodate these large bursts, prior art systems were required to include worst-case sized buffers capable of supporting these data bursts. Because these data burst may be infrequent, providing large buffer space to accommodate an occasional burst is inefficient use of buffer resources. This requires larger amounts of memory to be included within the communication switch, and thus increases cost and complexity of the switches and the overall communication system.
Therefore, a need exists for a method and apparatus for buffering data cells in a communication switch that supports varying priority levels, where the use of a limited amount of buffering memory is efficient but able to accommodate occasional large bursts of data.


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patent: 6442139 (2002-08-01), Hosein

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