Cutting – Processes
Reexamination Certificate
1999-07-12
2001-03-13
Bray, W. Donald (Department: 3725)
Cutting
Processes
C083S140000, C083S690000, C083S929100
Reexamination Certificate
active
06199464
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to semiconductor fabrication methods and an apparatus therefor.
DESCRIPTION OF THE RELATED ART
Techniques are well known for confining solder to appropriate areas of an electrical device while preventing the solder from flowing through all portions of the device and thereby destroying or impairing its functioning. The small size of such devices produces a strong wicking or capillary action in any melted solder which is applied to the device, so that solder is often drawn throughout the device by the wicking action, preventing the device from functioning properly. As a result it is often necessary to apply a solder resist material which resists the flow of solder, to various portions of a device to combat the wicking or capillary action.
Frequently, it is desirable to cut an organic substrate having a solder resist on it, by using a punch.
FIG. 1
shows an enlarged view of a cutting portion of a conventional apparatus
10
for cutting an organic substrate or printed circuit board (PCB)
30
. Only the rightmost portion of the substrate
30
is shown.
The substrate
30
may have an integrated circuit (IC) chip (not shown) on its top surface. An example of such a PCB with an IC chip mounted thereon is provided in U.S. Pat. Nos. 5,612,576 and 5,767,466, the disclosures of which are specifically incorporated herein by reference. (See FIG. 1, PCB 12 and chip 22 in U.S. Pat. No. 5,612,576, and FIG. 1A, PCB 20 and chip 30 in U.S. Pat. No. 5,767,446.)
Referring again to
FIG. 1
, substrate
30
may contain a plurality of layers including conductive wirings, which are well known in the art. The substrate
30
has a ball grid array, including solder balls
36
on a surface of the substrate. The solder balls
36
are formed on electrodes
38
. Electrodes
38
are coupled to circuits (not shown) within the substrate
30
. A solder resist layer
37
is formed on the surface of the substrate
30
, to prevent the solder from flowing to the regions that are shielded by the solder resist
37
. Another solder resist layer
35
is provided on the top side of the substrate
30
. An overmold
40
is provided on the side of the Substrate
30
opposite the solder balls
36
. The overmold
40
encapsulates and protects the IC chip (not shown) that is bonded to the substrate
30
, along with the wires (not shown) that are used to wire bond the IC chip to the substrate
30
.
FIG. 1
shows a simplified view of the cutting mechanism of the punch mechanism. A detailed explanation of the operation of a punch is not included herein. Details of an exemplary conventional punch mechanism are described in U.S. Pat. No. 4,425,829, the disclosure of which is specifically incorporated herein by reference. The conventional punch apparatus
10
of
FIG. 1
has a bottom die
20
beneath the substrate, and a stripper
14
and punch plate
16
above the substrate. The punch plate
16
and the punch
12
are actuated downward together, for example, by a single plate
17
overlying both the punch plate
16
and the punch
12
; the plate
17
is actuated downward by an actuator
19
. The stripper plate
14
and punch plate
16
are coupled by springs
18
, so that stripper
14
can move upward relative to the punch
12
. The bottom die
20
supports the substrate
30
for cutting.
In a punch operation, the punch plate
16
and punch
12
are actuated downwards towards the substrate. When the surface
15
of the stripper plate
14
contacts the substrate
30
, the springs
18
are compressed, and stripper plate
14
moves upward relative to punch plate
16
, so that further displacement of the punch plate
16
does not cause the stripper plate
14
to crush the substrate
30
. Meanwhile, the punch
12
is driven downward through the substrate
30
. Because the bottom die
20
supports the underside of the substrate
30
, the punch
12
shears the substrate.
FIG. 2
shows a device
31
after completion of the punch operation. Undesirably, stress created by the punch force frequently causes cracks
50
in the solder resist
37
. About 85% of the substrates cut in the apparatus of
FIG. 1
exhibit solder resist cracks.
These crack lines propagate on the solder resist
37
along the line of impact by the punch
12
.
Various attempts have been made to solve the problem of solder resist cracking. These attempted solutions include: using a different punch profile; varying the clearance between the die and the punch; varying the speed of the cutting, placing a rubber shock absorber beneath the die, and combinations of these techniques. Of these attempted solutions, only the rubber shock absorber has been found to help reduce the solder resist cracks at the edge of the substrate. Unfortunately, the very short useful life of the shock absorber makes this solution impractical to implement in production.
A more practical technique for reducing solder resist cracking is desired.
SUMMARY OF THE INVENTION
The present invention is a method for cutting a substrate and a substrate formed by the method. The substrate has first and second portions, each portion having a respectively different level. The first portion of the substrate is supported on a first support surface at a first level, and the second portion of the substrate is supported on a second support surface at a second level. The substrate is cut between the first support surface and the second support surface.
Another aspect of the invention is an apparatus for cutting a substrate having first and second portions, each portion having a respectively different level. The apparatus has a first support surface at a first level. The first portion of the substrate is supported by the first support surface. The apparatus has a second support surface at a second level. The second portion of the substrate is supported by the second support surface. The apparatus also has a punch that cuts the substrate between the first support surface and the second support surface.
REFERENCES:
patent: 4077443 (1978-03-01), Coller et al.
patent: 4425829 (1984-01-01), Kranik et al.
patent: 4653365 (1987-03-01), Takasaki et al.
patent: 5042352 (1991-08-01), Lux
patent: 5612576 (1997-03-01), Wilson et al.
patent: 5701790 (1997-12-01), Saito
patent: 5767446 (1998-06-01), Ha et al.
patent: 5786239 (1998-07-01), Ohsawa et al.
patent: 5813108 (1998-09-01), Ryan
patent: 5813301 (1998-09-01), Fujita
Chua Kok Hua
Ju Jinhan
Tan Kim Hwee
Bray W. Donald
Duane Morris & Heckscher LLP
Koffs Steven E.
Lucent Technologies - Inc.
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