Boots – shoes – and leggings
Patent
1989-11-16
1993-01-12
Dixon, Joseph L.
Boots, shoes, and leggings
364DIG1, G06F 1206
Patent
active
051796813
ABSTRACT:
A processor having a plurality of windowed registers comprising IN, OUT and local window registers, where the IN registers of each window are addressable as the OUT registers of a logically-adjacent succeeding window. The processor also having a cache of two sets of IN/OUT registers with switchable addresses and a set of local cache registers. The addresses of the first set of IN/OUT registers can be changed to the addresses of the second set of IN/OUT registers, and vice versa, when the current window changes during a save or restore operation.
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patent: 4811208 (1989-03-01), Myers et al.
patent: 4891753 (1990-01-01), Budde et al.
patent: 4947366 (1990-08-01), Johnson
patent: 5083263 (1992-01-01), Joy et al.
RISC Architecture, Tabak, Daniel, 1987, pp. 30-32, 47.
Dixon Joseph L.
Elmore Reba I.
Sun Microsystems Inc.
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