Method and apparatus for CPU failure recovery in symmetric multi

Details Method and apparatus for CPU failure recovery in symmetric multi Method and apparatus for CPU failure recovery in symmetric multi

1996-09-06

1998-09-29

Tu, Trinh L.

39518218, 395677, G06F 1100, G06F 900

Patent

active

058156518

ABSTRACT:
Method and apparatus for operating a multiprocessor data processing system (10) of the symmetric multiprocessor (SMP) type so as to continue the execution of a process running on a failed CPU (CPU-F). In response to a failure of one of the CPUs a first method performs the steps of: detecting that one of the CPUs has failed during the execution of a first process; extracting an internal processing state from the CPU-F; inserting the extracted processing state into a second, recovery CPU (CPU-R); and completing the execution of the first process with the CPU-R. During the time that the CPU-R executes the first process the CPU-R assumes the identity of the CPU-F, and furthermore assumes the ownership of any spinlocks that may have been owned by CPU-F. If selected from an active set of CPUs the operation of the CPU-R may be timeshared between the first process and a process that is running in the CPU-R. Timesharing involves periodically unloading one processing state and loading another into CPU-R; the loading and unloading of states being accomplished by a service processor unit (SPU 12) over a serial scan bus or a parallel diagnostic bus. Loading and unloading may also be accomplished in a high speed manner through a microcode-assisted process run by CPU-R.

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