Method and apparatus for coupling an ECL output signal using a c

Details Method and apparatus for coupling an ECL output signal using a c Method and apparatus for coupling an ECL output signal using a c

1988-09-02

1990-05-15

Hudspeth, David

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307446, 307455, 307246, 307264, 307482, H03K 1901

Patent

active

049260650

ABSTRACT:
A method and apparatus for providing ECL output signals to a capacitative load includes differential amplification of input signals with a first output of a differential amplifier connected for establishing a voltage level between voltage limits V.sub.cc and V.sub.ee at the output of an output driver in response to variations in the first amplifier output. A pull-down transistor has a collector connected to the output driver output, an emitter connected to the V.sub.ee voltage source, and a base coupled through a boost capacitor to the second amplifier output. A voltage clamp embracing a clamp transistor with a base connected to receive a predetermined control voltage has an emitter connected to the boost capacitor and the pull-down transistor base and a collector connected to the V.sub.cc voltage source. The clamp transistor is operated in Darlington configuration to provide a minimum discharge impedence to the base of the pull-down transistor. A recovery capacitor is connected between the clamp transistor base and the first amplifier output to speed up the clamp transistor's operation.

REFERENCES:
patent: 4539493 (1985-09-01), Varadarajan
patent: 4626709 (1986-12-01), Mazumder et al.
patent: 4649294 (1987-03-01), McLaughlin
patent: 4687953 (1987-08-01), Varadarajan
patent: 4694203 (1987-09-01), Uragami et al.
patent: 4724343 (1988-02-01), Le Roux et al.
IEEE Journal of Solid State Circuits, Oct. 1989, A 23-ps/2.1-mW ECL Gate with an AC-Coupled Active Pull-Down Emitter-Follower Stage, pp. 1299-1306.

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