Electrical pulse counters – pulse dividers – or shift registers: c – Applications – Including memory
Patent
1989-02-23
1990-08-07
Heyman, John S.
Electrical pulse counters, pulse dividers, or shift registers: c
Applications
Including memory
377 34, 377 241, 36518912, G01C 2200, H03K 2140
Patent
active
049474103
ABSTRACT:
A nonvolatile memory has a linear array of memory cells to serially store counts by setting the cells one by one in correspondence with input pulses and when the array is full by resetting the cells one by one for successive pulses. When all the cells are reset a conventional binary counter is incremented and the serial count is repeated for further inputs. This procedure minimizes the erase/write sequences required to count a series of pulses. A shift register having a stage corresponding to each memory cell is used to read out the data from the linear array. Data is loaded from the array into the shift register and shifted out in a serial pulse train to a binary counter.
REFERENCES:
patent: 4528683 (1985-07-01), Henry
patent: 4682287 (1987-07-01), Mizuno et al.
patent: 4757522 (1988-07-01), Kieselstein
patent: 4807264 (1989-02-01), Bauer
patent: 4839909 (1989-06-01), Warner
DuBois Paul L.
Lippmann Raymond
Schnars Michael J.
Delco Electyronic Corp.
General Motors Corporation
Heyman John S.
Navarre Mark A.
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