Method and apparatus for converting logic test vectors to memory

Details Method and apparatus for converting logic test vectors to memory Method and apparatus for converting logic test vectors to memory

1995-06-26

1997-07-01

Canney, Vincent P.

Excavating

G06F 1100

Patent

active

056445814

ABSTRACT:
Logic test vectors, used for testing logic circuitry on a logic tester, are converted to test patterns having a format that is used by a memory tester. This allows an integrated circuit having both logic circuitry and a memory array to be tested on a memory tester. A software tool, or computer program, is used to convert the logic test vectors to test patterns, and also generates the memory test code for applying the test patterns to, for example, a logic intensive integrated circuit memory. The software tool is encoded using a high-level programming language and is executed on a computer system (60). The program allows the logic intensive integrated circuit memory to be tested on a memory tester, as compared to testing the integrated circuit memory on a logic tester, significantly reducing testing costs associated with manufacturing.

REFERENCES:
patent: 5475624 (1995-12-01), West

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