Patent
1995-12-29
1998-02-03
Meky, Moustafa M.
G06F 1540
Patent
active
057154767
ABSTRACT:
Memory access control logic for controlling sequential and toggle mode burst accesses to a memory in a computer system using toggle mode automatic increment logic. The memory access control logic of the invention controls the sequence in which locations of a memory are accessed during a memory burst access operation wherein the burst access sequence is determined by an order in which a burst access starting address is incremented. Toggle increment logic for incrementing a starting address in a toggle sequence is included in the computer system in which the memory access control logic of the invention is used. An input bus receives a burst access request and a burst access starting address indicating a first memory location to be accessed in response to the burst access request from a device in the computer system. Additional logic determines whether the device requires a linear increment sequence or a toggle increment sequence for the burst access. Control logic controls the toggle increment logic to increment the starting address in a linear sequence in response to determining that the first device requires a linear increment sequence.
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Khandekar Narendra
Kundu Aniruddha
Faatz Cynthia Thomas
Intel Corporation
Meky Moustafa M.
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