Method and apparatus for controlling fans and power supplies...

Data processing: generic control systems or specific application – Specific application – apparatus or process – Product assembly or manufacturing

Reexamination Certificate

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C700S021000, C700S079000, C700S081000, C700S299000, C700S300000, C702S182000, C324S760020

Reexamination Certificate

active

06901303

ABSTRACT:
A method and apparatus controls fans and power supplies to provide accelerated run-in testing. By modulating fans to increase case temperatures and adjusting power supplies to provide “worst case” voltages, a computer system can be subjected to a run-in tests under taxing conditions. By alternately cooling and heating devices such as CPUs, devices can be subjected to mechanical stresses associated with power-on/power off cycles. A time based test implements the present invention based on time, and a temperature based test implements the present invention based on temperature. The present invention can be used to implement a run-in test in which the computer system is operated at an elevated temperature, thereby achieving results similar to those achieved by performing a run-in test in an environmental chamber at an elevated temperature. Alternatively, the a run-in test can be performed by repeatedly cycling the temperature between relatively high and low values.

REFERENCES:
patent: 5543727 (1996-08-01), Bushard et al.
patent: 6246969 (2001-06-01), Sinclair et al.
patent: 411150166 (1999-06-01), None
“Determining the Effectiveness of Run-in: a Case Study in the Analysis of Repairable-System Data”, Zaino Jr. et al., IEEE Proceedings on Reliability and Maintainability Symposium, Jan. 21-23, 1992, pp. 58-70.*
“Thermal Control Hardware for Accelerated Run-In Testing of Multi-Chip Modules”, IBM Technical Disclosure Bulletin, Oct. 1, 1989, vol. 32, No. 5A, pp. 129-130.*
“Method for Prioritizing Execution of Test Cases”, IBM Technical Disclosure Bulletin, Jan. 1, 1993, vol. 36, No. 1, pp. 470-472.*
“Method for Controlling Test Execution in a Build-to-Order Test Environment”, IBM Technical Disclosure Bulletin, Dec. 1, 1993, vol. 36, No. 12, pp. 67-68.

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