Method and apparatus for controlling clock signals

Details Method and apparatus for controlling clock signals Method and apparatus for controlling clock signals

1998-06-15

2000-04-18

Lam, Tuan T.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Frequency or repetition rate conversion or control

327119, H03B 1900

Patent

active

060520043

ABSTRACT:
A clock signal control circuit includes a divider for dividing an external clock signal into multiple phase clock signals, timing difference dividers connected to the divider for dividing a difference in input timing of pulse edge between the multiple phase clock signals having different phases from each other to generate different phase clock signals, multiplexers connected to the timing difference dividers for multiplexing the different phase multiplied clock signals to generate multiplexed clock signals, and a synthesizer connected to the multiplexers for synthesizing the multiplexed clock signals into a single multiplied clock signal.

REFERENCES:
patent: 3826901 (1974-07-01), Band et al.
patent: 5254955 (1993-10-01), Saeki
patent: 5548249 (1996-08-01), Sumita et al.

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