Method and apparatus for controlling calculation error

Details Method and apparatus for controlling calculation error Method and apparatus for controlling calculation error

1998-05-19

2000-08-08

Ngo, Ohuong Dinh

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

708400, 708530, G06F 750, G06F 1100, G06F 1714

Patent

active

061015237

ABSTRACT:
A method and an apparatus for controlling calculation error produced by the accumulation error due to digit truncation in a non-integer computation. The error is eliminated by controlling the values of LSB, C.sub.in and the addition/subtraction selecting signal as, so that C.sub.in is not necessarily equal to C.sub.in. Considering a even number of cascaded pipelines, C.sub.in in the odd pipelines is set as 0, wherein C.sub.in in the even pipelines is set as 1. The resultant error is thus eliminated mutually by odd and even pipelines.

REFERENCES:
patent: 4760543 (1988-07-01), Ligtenberg et al.
patent: 5034910 (1991-07-01), Whelchel et al.

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