Patent
1994-08-19
1998-11-10
Toplu, Lucien U.
395670, 395672, G06F 946
Patent
active
058357670
ABSTRACT:
A method and system are disclosed for limiting the processing power of a CPU or CPUs in a multi-processing system comprising at least one constrained or hobbled CPU and a main memory. The novel method includes executing a high priority process on the CPU which effectively interrupts the processing of a task at a predetermined time T.sub.1 during a full time cycle T.sub.0 -T.sub.2 rendering the CPU unavailable for a predetermined period of time (T.sub.1 to T.sub.2) which represents a predetermined percentage of the CPUs full computing power. The task that is interrupted is continued at the start of the next time cycle of the CPU so that all tasks are completed. The power of any CPU so hobbled may be decreased by a predetermined percentage of full power by decreasing the processing time cycle between T.sub.0 and T.sub.1, without the need for hardware or operating system modification.
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Park Alice
Samuels Steven B.
Sowell John B.
Starr Mark T.
Toplu Lucien U.
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