Method and apparatus for controlling an output frequency of a ph

Details Method and apparatus for controlling an output frequency of a ph Method and apparatus for controlling an output frequency of a ph

1997-06-16

1999-11-02

Kinkead, Arnold

Oscillators

Automatic frequency stabilization using a phase or frequency...

Afc with logic elements

331 14, 331 16, 331 20, 345213, 327159, 327160, H03L 718

Patent

active

059778369

ABSTRACT:
A method and apparatus for controlling an output frequency of a phase locked loop is accomplished by determining a plurality of divider ratios which are based on an input frequency, parameters, and a desired output frequency. Each of the divider ratios is representative of a ratio between the output frequency and input frequency of the phase locked loop. Having determined the plurality of divider ratios, another determination is subsequently made to determine whether the plurality of divider ratios enable the phase locked loop to produce the output frequency within a given frequency tolerance, i.e., within an allowable error. The determination is based on whether changing the divider ratio from the one of the plurality of ratios to an adjacent ratio causes the output frequency to change more than the allowable error. If so, the plurality of ratios needs to be recalculated based on a change in the input frequency and/or one of the parameters. When the output frequency can be established within the allowable error (i.e., a change from one of the divider ratios to another one produced calculated output frequencies that are within the allowable error), the phase locked loop utilizes one of the plurality of ratios to establish the output frequency. The PLL may further utilize other ratios of the plurality of ratios to finely adjust the output frequency thereby effecting a change on the display update rate.

REFERENCES:
patent: 5700357 (1997-12-01), Bland et al.

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