Static information storage and retrieval – Addressing – Byte or page addressing
Patent
1997-06-30
1998-12-08
Nelms, David
Static information storage and retrieval
Addressing
Byte or page addressing
G11C 800
Patent
active
058480250
ABSTRACT:
A method (600, 700) and apparatus (402) for controlling a memory device, such as a synchronous dynamic random access memory (404), includes a user-programmable register containing a new parameter, PRECHARGE DELAY TIME. A memory controller (402) uses the parameter to set a minimum limit through which each page is kept open after an initial access. Subsequent access to the same page cause the controller to reset the limit, thereby extending the open page. Accesses to different pages, refresh operations, and maximum row address strobe parameters can force the page closed. A user can tune the PRECHARGE DELAY TIME to keep pages open through the time period in which it is likely that additional accesses will be to the same page. Conversely, open pages can be closed after that time period is exceeded. In both cases, the memory device will be ready for a subsequent access with minimum latency.
REFERENCES:
patent: 5335336 (1994-08-01), Kametani
Becker Michael C.
Marietta Bryan D.
Weber Laura
Chastain Lee E.
Lam David
Motorola Inc.
Nelms David
LandOfFree
Method and apparatus for controlling a memory device in a page m does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for controlling a memory device in a page m, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for controlling a memory device in a page m will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-185448