Method and apparatus for controlling a clock signal

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Details

364DIG1, 3642702, 3642703, 3642712, G06F 1300

Patent

active

052476561

ABSTRACT:
A data processing device includes first and second blocks which have different processing times and which operate in synchronism with a clock signal. One of the first and second blocks is selected and enabled in accordance with an instruction representing which of the first and second blocks should be selected and enabled. A clock change signal is generated on the basis of the instruction. A period of the clock signal is changed in accordance with the clock change signal.

REFERENCES:
patent: 4819164 (1989-04-01), Branson
patent: 4931986 (1990-06-01), Daniel et al.
patent: 4981296 (1991-01-01), Shiraishi et al.

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