Method and apparatus for conducting bus transactions between two

Details Method and apparatus for conducting bus transactions between two Method and apparatus for conducting bus transactions between two

1995-04-26

1995-11-28

Coleman, Eric

Boots, shoes, and leggings

395298, 395731, 364DIG1, 364391, 364403, 364400, G06F 1200

Patent

active

054716373

ABSTRACT:
An asynchronous computer bus providing transfers of data on consecutive processor clock cycles. The bus comprises consecutive data transfer commence indication means, starting address transmission means, consecutive data transfer indication means, and data transmission means. The invention provides for the "burst" capabilities of modern processors wherein entire blocks of data are transmitted within a single request.

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i486 Microprocessor Hardware Reference Manual; pp. 4-8-4-18; 3-28-3-42; Appendix B; 5-1-5-51; 8-1-8-40.

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