Method and apparatus for concurrently accessing multiple memorie

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395878, 395880, G06F 1316

Patent

active

056257961

ABSTRACT:
A data processing system in which a plurality of processors or other memory access devices operate either synchronously or asynchronously with a memory interface device, which in turn provides access to one or more memory units on a time-division basis. This is accomplished by providing each memory unit a series of time-divisioned access opportunities and controlling the phase relationship between these time-divisioned access opportunities. Accordingly, two or more access devices can address an equal number of memory units simultaneously.

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