Patent
1996-01-11
1997-04-29
Swann, Tod R.
395878, 395880, G06F 1316
Patent
active
056257961
ABSTRACT:
A data processing system in which a plurality of processors or other memory access devices operate either synchronously or asynchronously with a memory interface device, which in turn provides access to one or more memory units on a time-division basis. This is accomplished by providing each memory unit a series of time-divisioned access opportunities and controlling the phase relationship between these time-divisioned access opportunities. Accordingly, two or more access devices can address an equal number of memory units simultaneously.
REFERENCES:
patent: 4151593 (1979-04-01), Jenkins et al.
patent: 4432051 (1984-02-01), Bogaert et al.
patent: 4467420 (1984-08-01), Murakami et al.
patent: 4481572 (1984-11-01), Ochsner
patent: 4495567 (1985-01-01), Treen
patent: 4633392 (1986-12-01), Vincent et al.
patent: 4688166 (1987-08-01), Schneider
patent: 4785396 (1988-11-01), Murphy et al.
patent: 4980850 (1990-12-01), Morgan
patent: 5003465 (1991-03-01), Chisolm et al.
patent: 5005121 (1991-04-01), Nakada et al.
patent: 5012408 (1991-04-01), Conroy
patent: 5097437 (1992-03-01), Larson
Buchholz Dale R.
Kaczmarczyk John M.
Slawecki Jeffrey A.
Hillman Val Jean
Motorola Inc.
Peikari J.
Swann Tod R.
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