Data processing: structural design – modeling – simulation – and em – Emulation – Of instruction
Reexamination Certificate
2005-04-05
2005-04-05
Frejd, Russell (Department: 2128)
Data processing: structural design, modeling, simulation, and em
Emulation
Of instruction
C703S014000, C716S030000, C716S030000
Reexamination Certificate
active
06876962
ABSTRACT:
An emulation system equipped to emulate multiple circuit designs concurrently is disclosed. The emulation system includes an emulator having reconfigurable emulation resources for emulating circuit designs, and a host system programmed with programming instructions that operate to generate coordinated configuration information for a number of circuit designs to enable the reconfigurable emulation resources to be configured in a coordinated manner to allow the circuit designs to be emulated concurrently.
REFERENCES:
patent: 5036473 (1991-07-01), Butts et al.
patent: 5109353 (1992-04-01), Sample et al.
patent: 5960191 (1999-09-01), Sample et al.
patent: 6265894 (2001-07-01), Reblewski et al.
patent: 6377912 (2002-04-01), Sample et al.
patent: 6473726 (2002-10-01), Reblewski
patent: 0 651 343 (1995-05-01), None
patent: WO 9406210 (1994-03-01), None
Bosi et al., Reconfigurable Pipelined 2-D Convolvers for Fast Digital Signal Processing, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 7, Issue 3, Sept. 1999, pp. 299-308.
Ejnioui et al., Design Partitioning on Single-Chip Emulation Systems, 13thInternational Conference on VLSI Design, 2000, pp. 234-239.
Erhard et al., First Steps Towards a Reconfigurable Asynchronous System, IEEE International Workshop on Rapid System Prototyping, 1999, pp. 28-31.
Jean et al., Dynamic Reconfiguration of Support Concurrent Applications, IEEE Symposium of FPGAs for Custom Computing Machines, 1998, pp. 302-303.
Jean et al., Dynamic Reconfiguration to Support Concurrent Applications, IEEE Transactions on Computers, Jun. 1999, IEEE, USA, vol. 48, No. 6, pp. 591-602.
Kocan et al., Concurrent D-Algorithm on Recconfigurable Hardware, IEEE/ACM International Conference on Computer—Aided Design, 1999, digest of Technical Papers, pp. 152-155.
Teramac Compiler, Nov. 29, 1993.
Xilinx, “The Programmable Gate Array Design Handbook” (1986).
Banner & Witcoff , Ltd.
Frejd Russell
Mentor Graphics Corporation
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