Method and apparatus for computing a sum of packed data...

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C712S022000

Reexamination Certificate

active

06377970

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the field of microprocessors; more particularly, the present invention relates to a method and apparatus for computing a sum of absolute differences.
2. Description of Related Art
A sum of absolute differences is used in many applications including video applications such as Motion Pictures Expert Group (MPEG) encoding.
One method of computing a packed sum of absolute differences (PSAD) of packed data A having eight byte elements A
0
. . . A
7
and packed data B having eight byte elements B
0
. . . B
7
is to compute Ai−Bi and Bi−Ai for each value of i from 0 to 7, select the results that are non-negative, and add the non-negative results together. One implementation uses sixteen adders (two adders for each pair of byte elements), eight muxes (to select the non-negative values from each pair of results) and an adder tree to sum the non-negative results.
As more devices are used, more silicon area is needed in a semiconductor device. Semiconductor devices generally have a cost proportional to the silicon area used. Therefore, it is desirable to reduce the number of devices used to perform the PSAD instruction.
One method of computing a PSAD with less devices is to use the same device to serially operate on multiple data elements. For example, one adder may compute A
0
−B
0
and B
0
−A
0
sequentially, another may compute A
1
−B
1
and B
1
−A
1
sequentially, etc. This reduces the number of adders (silicon area) used, but increases the amount of time required to compute a PSAD.
What is needed is a method and apparatus to reduce the amount of silicon area required to implement a PSAD instruction without increasing the time required to compute the PSAD.
SUMMARY OF THE INVENTION
A method and apparatus that adds each one of multiple elements of a packed data together to produce a result is described. According to one such a method and apparatus, each of a first set of portions of partial products is produced using a first set of partial product selectors in a multiplier, each of the first set of portions of the partial products being zero. Each of the multiple elements is inserted into one of a second set of portions of the partial products using a second set of partial product selectors, each of the second set of portions of the partial products being aligned. Each of the multiple elements are added together to produce the result including a field having the sum of the multiple elements.


REFERENCES:
patent: 4920508 (1990-04-01), Yassaie et al.
patent: 5594679 (1997-01-01), Iwata
patent: 5712797 (1998-01-01), Descales et al.
patent: 5719642 (1998-02-01), Lee
patent: 5721697 (1998-02-01), Lee et al.
patent: 5724032 (1998-03-01), Klein et al.
patent: 5734420 (1998-03-01), Lee et al.
patent: 5737537 (1998-04-01), Gardos et al.
patent: 5740037 (1998-04-01), McCann et al.
patent: 5742529 (1998-04-01), Mennemeier et al.
patent: 5760961 (1998-06-01), Tompkin et al.
patent: 5763883 (1998-06-01), Descales et al.
patent: 5787210 (1998-07-01), Kim
patent: 5790208 (1998-08-01), Kwak et al.
patent: 5793661 (1998-08-01), Dulong et al.
patent: 5793879 (1998-08-01), Benn et al.
patent: 5793900 (1998-08-01), Nourbakhsh et al.
patent: 5805491 (1998-09-01), Bechade
patent: 5805913 (1998-09-01), Guttag et al.
patent: 5841676 (1998-11-01), Ali et al.
patent: 5852473 (1998-12-01), Horne et al.
patent: 5865752 (1999-02-01), Seyed-Bolorforosh et al.
patent: 5876342 (1999-03-01), Chen et al.
patent: 5880979 (1999-03-01), Mennemeier et al.
patent: 5884089 (1999-03-01), Orian et al.
patent: 5901248 (1999-05-01), Fandrianto et al.
patent: 5907842 (1999-05-01), Mennemeier et al.
patent: 5935863 (1999-08-01), Descales et al.
patent: 5946405 (1999-08-01), Kim et al.
patent: 6026483 (2000-02-01), Oberman et al.
patent: 6032170 (2000-02-01), Guttag et al.
patent: 6085213 (2000-07-01), Oberman et al.
Visual Instruction Set (VIS™), User's Guide, Sun Microsystems, Inc., version 1.1 Mar., 1997, pp. 41-43, 87-88.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method and apparatus for computing a sum of packed data... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and apparatus for computing a sum of packed data..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for computing a sum of packed data... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2921049

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.