Method and apparatus for computing a detailed routability...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing

Reexamination Certificate

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C716S126000, C716S130000, C716S131000

Reexamination Certificate

active

08001514

ABSTRACT:
One embodiment of the present invention provides a system that computes a routability estimation across a collection of local routing regions associated with a circuit layout. This system first selects a first local routing region associated with a route overflow, wherein a respective local routing region is associated with an estimation of a number of route overflows for routing layers in a region of the circuit layout. Furthermore, a respective routing layer is associated with a preferred direction variable D. Next, the system transfers an overflow value k in direction d away from an overflowing routing layer for the first local routing region to a second local routing region, which has the capacity to handle an overflow of k or more routes in a direction d. Finally, the system computes a global routability estimation as a function of a global overflow cost and an adjacent overflow cost.

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Kastner, Ryan et al., “Predictable Routing”, pp. 110-113, XP-002245296, 2000 IEEE.

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