Television – Camera – system and detail – Combined image signal generator and general image signal...
Reexamination Certificate
1998-09-01
2003-03-04
Christensen, Andrew (Department: 2615)
Television
Camera, system and detail
Combined image signal generator and general image signal...
Reexamination Certificate
active
06529238
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
The technical field of this invention is error correction techniques for semiconductor image sensors such as video cameras or electronic still cameras.
BACKGROUND OF THE INVENTION
There is increasing interest in CMOS (Complementary Metal Oxide Semiconductor) imagers. These imagers can be fabricated in standard CMOS processes such as used for semiconductor memory or logic circuits. These CMOS processes differ from the CCD (Charge Coupled Device) processes previously used to form imagers.
Constructing imagers from CMOS processes has several advantages over the prior use of CCD processes. Charge coupled devices are constructed using semiconductor processes that are incompatible with CMOS circuits. It is usually not cost effective to construct other integrated circuits in a facility designed for CCD fabrication. Thus the production capacity of facility must be matched to the demand for a narrow range of products, i.e. the CCD imager. An imager constructed of CMOS processes may be fabricated in the same facility that fabricates semiconductor memory and logic integrated circuits. Production from such a facility may be allocated to semiconductor memories, semiconductor logic circuits and CMOS imagers. This permits the capacity of the facility to be divided among plural types of integrated circuits enhancing the opportunity to achieve full utilization without excess overcapacity. Charge coupled device imagers commonly require a 12 volt power supply rather than the 5 volt or 3.3 volt power supplies typically used for CMOS integrated circuits. In a typical system including a CCD imager and other electronics, a separate 12 volt power supply must be provided to power the CCD. This voltage difference causes CCD imagers to typically consume more electric power than similarly sized CMOS integrated circuits. This makes CCD imagers less useful in portable, battery powered applications. In addition, higher typical power consumption of CCD's may require a more aggressive thermal management and a expensive package. Lastly, certain auxiliary circuits, such as analog to digital converters or memory, may be fabricated on the same integrated circuit as a CMOS imager. It is difficult to adapt the semiconductor manufacturing processes used to fabricate CCD's to provide similar on-chip circuits. The capability of integrating additional logic functions on the CMOS imager integrated circuit permits a lower integrated circuit package count for the end use system. This lower package count enables a lower assembly cost and a lower system cost. This lower package count may also lower the system power consumption, making such circuits valuable for portable systems.
There is a common problem with CMOS imagers that reduces their widespread use despite these advantages over CCD's. Due to variations in the semiconductor manufacturing process, CMOS imagers are subject to point defects from single image pixels. These point defects typically appear as spatially fixed isolated white spots and are called white spot noise. These point defects are due to variations in the dark current among the individual light sensitive elements. The mechanism creating this white spot noise will be explained in detail below. There are several methods typically employed to deal with white spot noise. The most commonly used method is to discard imagers having too much white spot noise. This technique lowers the effective yield and thus increases the cost of each good imager. A second method measures the white spot noise upon manufacture. This information is saved in a memory such as an Electrically Programmable Read Only Memory (EPROM). During use the stored white spot noise value for each pixel is subtracted from the current imager signal to produce a signal corrected for white spot noise. The circuits needed to measure and store the white spot noise add complexity to the system. This additional complexity may increase the system cost prohibitively. In addition, the magnitude of white spot noise is dependent upon the imager ambient temperature and this method fails to account for this variation. Another method periodically measures the dark current of the imager. The imager is covered with a mechanical shutter and the dark image signal is stored. The dark image signal is subtracted from the current imager signal producing a corrected signal. This method works well for imagers used in systems with mechanical shutters, however many imagers applications such as video cameras do not have mechanical shutters. This technique may also increase the system cost prohibitively. Lastly, the image signal may be spatially filtered to compensate for white spot noise. A median filter is typically used. A median filter substitutes the median image signal of the nine pixels of a three by three block having the current pixel in the center for the current pixel image signal. A median filter requires ordering the signal values of the nine pixels. This requires very complex circuits, particularly if the median filtering is performed in the analog domain. Additionally, a median filter is a form of spatial low pass filter and may noticeably reduced the sharpness of the image. Due to these disadvantages, no known method of white spot compensation is entirely satisfactory.
As a consequence of this, there is a need in the art for a better white spot compensation technique for CMOS imagers. Such a better white spot compensation technique would permit the advantages of CMOS imagers to be employed more often.
SUMMARY OF THE INVENTION
This invention corrects of white spot noise in an imager. For each pixel the maximum brightness value of eight surrounding pixels is determined. The brightness value each pixel is compared with this maximum brightness value of the eight surrounding pixels. If the brightness value of the pixel is greater than the brightness value the maximum brightness value of the eight surrounding pixels, then the compensated output is the maximum brightness value of the eight surrounding pixels. If the brightness value of the pixel is less than the maximum brightness value of the eight surrounding pixels, then no compensation is applied. The output is the brightness value of that pixel. Alternatively the brightness value of the pixel may be compared with the maximum brightness value of the eight surrounding pixels plus a threshold value.
A further embodiment stores correction values for a few pixels along with an address indication. If a particular pixel does not have a stored correction value, then the above described compensation is used. If a particular pixel has a stored correction value, then this is subtracted from the brightness value of the particular pixel. If this difference is less than the maximum brightness value of the eight surrounding pixels, then this difference is the compensated output. Otherwise the compensation output is the maximum brightness value of the eight surrounding pixels. The stored correction value is replaced with the difference between the brightness value of the particular pixel and the maximum brightness value of the eight surrounding pixels if this is greater than the stored correction value.
This invention is suitable for embodiment in analog CMOS circuits on the same integrated circuit as a CMOS imager.
REFERENCES:
patent: 3866980 (1975-02-01), Eisele et al.
patent: 4343021 (1982-08-01), Frame
patent: 4541116 (1985-09-01), Lougheed
patent: 4667303 (1987-05-01), Pfennings
patent: 4739495 (1988-04-01), Levine
patent: 5047861 (1991-09-01), Houchin et al.
patent: 5086343 (1992-02-01), Cook et al.
patent: 5327131 (1994-07-01), Ueno et al.
patent: 5327246 (1994-07-01), Suzuki
patent: 5331420 (1994-07-01), Yamano et al.
patent: 5627722 (1997-05-01), Hirst
patent: 5673058 (1997-09-01), Uragami et al.
patent: 6028628 (2000-02-01), Van Der Valk
patent: 6293465 (2001-09-01), Heller et al.
patent: 6307393 (2001-10-01), Shimura
Mahant-Shetti Shivaling S.
Martin David A.
Brady III W. James
Christensen Andrew
Marshall, Jr. Robert D.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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