Method and apparatus for compensating for delays in modulator lo

Modulators – Pulse or interrupted continuous wave modulator – Including stabilization or alternatively distortion – noise...

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332109, 332123, 332162, 330 10, 455126, H03C 106, H03C 308, H03F 338

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059091533

ABSTRACT:
A modulator loop designed to operate in a frequency range of interest is described. The loop includes a loop output terminal and a switching stage, the output of which is coupled to the loop output terminal. The switching stage has a first delay associated therewith. The output of a modulator stage is coupled to the input of the switching stage. A first feedback path is coupled between the loop output terminal and the feedback input of the modulator stage. A feedback filter is coupled between the output of the modulator stage and the feedback input of the modulator stage which compensates for the first delay. The feedback filter is operable to transmit frequencies outside the frequency range of interest and attenuate frequencies in the frequency range of interest.

REFERENCES:
patent: 4843339 (1989-06-01), Burt et al.
patent: 5352986 (1994-10-01), Modgil et al.
patent: 5610553 (1997-03-01), Kirn
H. Ballan, et al., "12V .SIGMA.-.increment. Class-D Amplifier in 5V CMOS Technology, " 1995, Switzerland, IEEE CICC, pp. 559-562.
T. Ritoniemi, et al., "Design of Stable High Order 1-Bit Sigma-Delta Modulators," May 1990, Finland, IEEE Proc., pp. 127-130.

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