Method and apparatus for communicating data between first...

Multiplex communications – Channel assignment techniques – Using time slots

Reexamination Certificate

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Details

C370S503000

Reexamination Certificate

active

06751232

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to line interface circuits used in telephone switching systems, and more particularly to line interface cards capable of handling two types of data, each at a different bit rate. Such two types of data may include both pulse code modulated (PCM) delay-sensitive voice data and general sporadic data such as that acquired from a high speed modem on a dedicated dataline. Such a dedicated dataline may be an asymmetrical digital subscriber loop.
BACKGROUND OF THE INVENTION
Present central office switch architectures include subscriber loop circuits which are terminated in a central office at a main distribution frame. From the main distribution frame, subscriber loop circuits are connected to respective line cards which are connected to a bus interface card. The line cards essentially act to Pulse Code Modulate and demodulate voice data transmitted to and from the subscriber. The bus interface card essentially acts as a many-to-one full-duplex multiplexer which places Pulse Code Modulated (PCM) fragments of the voice data into appropriate time slots on a serial communications channel of a central office switch.
A separate similar arrangement including data line cards and a data bus interface card is used to interface dedicated data lines to a somewhat similar switch, such as an Ethernet switch, to accomplish a similar purpose.
It will therefore be appreciated that under existing central office architectures, two separate systems are required to handle voice and data communications.
Voice data equipment, however, has unused capacity for communications because PCM conversation fragments for a given line card are only transmitted to the bus interface card during a small sub-interval of a cycle period while the PCM conversation fragments of other line cards are being transmitted to the bus interface card during remaining sub-intervals. Thus, there is unused idle time on each line card/bus interface connection.
If this idle time could be used for data, a single, modified line card could be used to simultaneously accept both analog voice information and Quadrature Amplitude Modulation (QAM) data on the subscriber loop, eliminating the need for a separate dataline and eliminating the need for separate equipment to interface a dedicated dataline to the data switch. The present invention addresses this problem.
SUMMARY OF THE INVENTION
In accordance with one aspect of the invention, there is provided a method of communicating data between first and second pairs of transceivers communicating on a common communications link. The method includes the steps of monitoring the common communications link to identify idle periods during which transceivers of the first transceiver pair are not communicating, synchronizing transceivers of the second pair of transceivers for communication with each other, and establishing communications between the transceivers of the second pair during the idle periods.
Preferably, the method includes the step of monitoring which includes the step of detecting an initial synchronization pattern on the common communications link.
Preferably, the method includes the step of synchronizing which includes the step of transmitting a first synchronization message on the common communication link.
Preferably, the method includes the step of transmitting the first synchronization message during the idle periods.
Preferably, the method includes the step of transmitting a second synchronization message a pre-determined time after transmitting the first synchronization message.
Preferably, the method includes the step of detecting the first and second synchronization messages and the pre-determined time between the first and second synchronization messages.
Preferably, the method includes the step of transmitting n sequential reply synchronization messages during the idle periods.
Preferably, the method includes the step of detecting the n sequential reply synchronization messages during the idle periods and determining a value for n.
Preferably, the method includes the step of transmitting the first and second synchronization messages in respective time slots separated by n quiet time slots.
Sequential reply synchronization messages during the idle periods and determining.
Preferably, the method includes the step of comparing the number n of the sequential reply synchronization messages received with the number of the quiet time slots between the first and second synchronization messages to determine whether or not the number n is equal to the number of quiet time slots between the first and second synchronization messages, wherein equality indicates synchronization of the second transceiver with the first transceiver and non-equality indicates lack of synchronization.
Preferably, the method includes the step of establishing communications between the transceivers of the second pair of transceivers which includes the step of transmitting and receiving data on the common communications link while periodically detecting a synchronization maintenance message on the common communications link.
Preferably, the method includes the step of periodically detecting the synchronization maintenance message, which includes the step of determining whether or not the synchronization maintenance message is received at periodic intervals of a first duration.
Preferably, the method includes the step of transmitting a synchronization maintenance message on the common communications link.
In accordance with another aspect of the invention, there is provided an apparatus for communicating data on a common communications link. The apparatus includes a first pair of transceivers communicating with each other on the common communications link at predefined intervals of time, a monitor for monitoring the common communications link to identify idle periods during which data associated with the first pair of transceivers is not present, a second pair of transceivers for transceiving data on the common communications link during the idle periods, and a synchronizer for synchronizing data transceivers of the second pair for communications therebetween.
Preferably, the monitor includes a detector for detecting an initial synchronization pattern on the common data link and preferably, the second transceiver includes the monitor.
Preferably, the synchronizer includes a transmitter for transmitting a synchronization message on the communication link and at least one transceiver of the second pair of transceivers includes the synchronizer. Preferably, at least one transceiver of the second pair of transceivers has the transmitter and preferably, the transmitter transmits the first synchronization message during the idle periods and preferably, the transmitter transmits a second synchronization message a pre-determined time after transmitting the first synchronization message.
Preferably, the apparatus includes a detector for detecting the first and second synchronization messages and the pre-determined time between the first and second synchronization messages.
Preferably, the transmitter transmits n sequential reply synchronization messages during the idle periods.
Preferably, the detector detects the n sequential reply synchronization messages during the idle periods and determines a value for n.
Preferably, the transmitter transmits the first and second synchronization messages in respective time slots separated by n quiet time slots.
The detector detects the n sequential reply synchronization messages during the idle periods and determines.
Preferably, the apparatus includes a processor for comparing the number n of sequential reply synchronization messages received with the number of quiet time slots between the first and second synchronization messages to determine whether or not the number n is equal to the number of quiet time slots between the first and second synchronization messages, wherein equality indicates synchronization of the second transceiver with the first transceiver and non-equality indicates lack of synchronization.
Preferably, the second tran

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