Method and apparatus for combining uncacheable write data into c

Details Method and apparatus for combining uncacheable write data into c Method and apparatus for combining uncacheable write data into c

1993-12-30

1996-10-01

Kim, Matthew M.

395417, 395403, 395872, G06F 1208

Patent

active

055617808

ABSTRACT:
The write-combining buffer combines data from separate data write operations into cache-line-sized buffer units for uncacheable types of data, such as frame buffer data. The write-combining buffer is implemented within a microprocessor having a data cache unit storing cacheable data within cache-lines. The data cache unit includes components and circuitry provided for efficiently inputting and outputting cache-line-sized units of data. By combining many uncacheable data write operations within a single cache-line-sized buffer, the circuitry and techniques employed for processing cache-lines are exploited in the processing of uncacheable data as well. A particular implementation is described wherein uncacheable data units corresponding to graphics write operations within an out-of-order microprocessor are combined into cache-line-sized buffers, then transmitted to a frame buffer using a burst mode eviction. Processor ordering requirements are ignored and global observability is relaxed for the graphics write operations. If the cache line sized buffer is not full when evicted, then a sequence of one or more burst-mode partial writes are employed to evict all data within the cache line sized buffer. If partial writes are employed, no delay between the partial writes is required.

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Popescu, et al., "The Metaflow Architecture," IEEE Micro, pp. 10-13 and 63-73, Jun. 1991.

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