Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – For high frequency device
Reexamination Certificate
2007-08-07
2007-08-07
Pert, Evan (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
For high frequency device
C257S686000, C438S109000, C029S739000
Reexamination Certificate
active
10694873
ABSTRACT:
An apparatus includes a circuit having first, second and third circuit portions, the first and third circuit portions each including at least one semiconductor circuit component. The second circuit portion includes at least one non-semiconductor circuit component, and is free of semiconductor circuit components. A first substrate has the first and second circuit portions disposed adjacent one side thereof. A second substrate is physically separate from the first substrate, and has the third circuit portion disposed adjacent a side thereof which faces the one side of the first substrate. The second and third circuit portions have electrically conductive parts which are coupled by thermo-formed bonds.
REFERENCES:
patent: 4693770 (1987-09-01), Hatada
patent: 5869894 (1999-02-01), Degani et al.
patent: 5975408 (1999-11-01), Goossen
patent: 6100593 (2000-08-01), Yu et al.
patent: 6576998 (2003-06-01), Hoffman
patent: 6621155 (2003-09-01), Perino et al.
patent: 6756663 (2004-06-01), Shiraishi et al.
patent: 2001/0002727 (2001-06-01), Shiraishi et al.
patent: 2001/0011766 (2001-08-01), Nishizawa et al.
patent: 2002/0072147 (2002-06-01), Sayanagi et al.
patent: 2002/0125558 (2002-09-01), Akram et al.
patent: 2004/0188818 (2004-09-01), Wang
patent: 100 11 005 (1999-07-01), None
Xu, et al., “A 3-10-GHz GaN-Based Flip-Chip Integrated Broad-Band Power Amplifier”, IEEE Transactions on Microwave Theory and Techniques, vol. 48, No. 12, Dec. 2000, pp. 2573-2578.
Debarbrata Gupta, “A Novel Active Area Bumped Flip Chip Technology for Convergent Heat Transfer from Gallium Arsenide Power Devices”, IEEE Transactions on Components, Packaging, and Manufacturing Technology, Part A, vol. 18, No. 1, Mar. 1995, pp. 82-86.
Mamoru Kajihara and Han Park, “A systems approach delivers SiP design”, http:/www.eetimes.com/showArticle.jhtml?articleID=26805951, (5 pages), Aug. 9, 2004.
Baker & Botts L.L.P.
Pert Evan
Raytheon Company
Sandvik Benjamin P.
LandOfFree
Method and apparatus for combining multiple integrated circuits does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for combining multiple integrated circuits, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for combining multiple integrated circuits will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3887734