Method and apparatus for coherent device initialization and...

Details Method and apparatus for coherent device initialization and... Method and apparatus for coherent device initialization and...

2007-12-17

2011-12-20

Chan, Eddie P (Department: 2183)

Electrical computers and digital processing systems: processing

Processing architecture

Array processor

C713S001000, C713S002000

Reexamination Certificate

active

08082418

ABSTRACT:
A method and apparatus for enabling usage of an accelerator device in a processor socket is herein described. A set of inter-processor messages is utilized to initialize a configuration/memory space of the accelerator device. As an example, a first set of inter-processor interrupts (IPIs) is sent to indicate a base address of a memory space and a second set of IPIs is sent to indicate a size of the memory space. Furthermore, similar methods and apparatus' are herein described for dynamic reconfiguration of an accelerator device in a processor socket.

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