Method and apparatus for code group identification and frame...

Pulse or digital communications – Spread spectrum – Direct sequence

Reexamination Certificate

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C375S147000, C375S148000, C375S150000, C375S151000, C375S152000, C375S343000, C375S350000, C375S371000, C370S324000

Reexamination Certificate

active

06775318

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to an apparatus and method for code group identification and frame synchronization used in direct-sequence code division multiple access (DS-CDMA) communication systems, such as wide-band CDMA systems and 3
rd
generation partnership project (3GPP) system.
2. Description of the Related Art
Currently, DS-CDMA cellular systems are classified as inter-cell synchronous systems with precise inter-cell synchronization and asynchronous systems without it. For inter-cell synchronous systems, an identical long code is assigned to each base station, but with a different time offset. The initial cell search can be executed by performing timing acquisition of the long code. The search for a peripheral cell on hand-offs can be carried out quickly because the mobile station can receive the offset information of the long code for the peripheral base station from the current base station. However, each base station requires a highly-time consistent apparatus, such as the global position system (GPS) and rubidium backup oscillators. Moreover, it is difficult to deploy GPS in basements or other locations RF signals cannot easily reach.
In asynchronous systems such as wide-band CDMA and 3GPP, each base station adopts two synchronization channels as shown in
FIG. 1
, such that a mobile terminal can establish the link and will not lose connection on hand-offs by acquiring the synchronization codes transmitted in synchronization channels. The first synchronization channel (primary synchronization channel, hereinafter PSCH) consists of an unmodulated primary synchronization code (denoted as C
psc
) with length of 256 chips transmitted once every slot. C
psc
is the same for all base stations. This code is periodically transmitted such that it is time-aligned with the slot boundary of downlink channels as illustrated in FIG.
1
. The second synchronization channel (secondary synchronization channel, hereinafter SSCH) consists of a sequence of 15 unmodulated secondary synchronization codes (C
ssc
i,1
to C
ssc
i,15
) repeatedly transmitted in parallel with C
psc
in the PSCH. 15 secondary synchronization codes are sequentially transmitted once every frame. Each secondary synchronization code is chosen from a set of 16 different orthogonal codes of length 256 chips. This sequence on the SSCH corresponds to one of 64 different code groups the base station downlink scrambling code belongs to. The code allocation for a base station is shown in FIG.
2
. These 64 sequences are constructed such that their cyclic-shifts are unique. In other words, if the count of cyclic-shifting is 0 to 14, all 960 (=64*15) possible sequences generated by cyclic-shifting the 64 sequences are different from each other. Base upon this property, cell search algorithms can be developed to uniquely determine both the code group and the frame timing.
During the initial cell search for the wide-band CDMA system proposed by 3GPP, a mobile station searches for the base station to which it has a lowest path loss. It then determines the downlink scrambling code and frame synchronization of the base station. This initial cell search is typically carried out in three steps:
Step 1: Slot Synchronization
During the first step of the initial cell search procedure, the mobile station searches for the base station to which it has lowest path loss via the primary synchronization code transmitted through the PSCH. This is typically done with a single matched filter matching to the primary synchronization code. Since the primary synchronization code is common to all the base stations, the power of the output signal of the matched filter should have peaks for each ray of each base station within a receivable range. The strongest peak corresponds to the most stable base station for linking. Detecting the position of the strongest peak yields the timing and the slot length that the strongest base station modulates. That is, this procedure causes the mobile station to acquire slot synchronization to the strongest base station.
Step 2: Frame Synchronization and Code-group Identification
During the second step of the cell search procedure, the mobile station utilizes the secondary synchronization code in the SSCH to find the frame synchronization and the code group of the cell found in the first step. Since the secondary synchronization code is transmitted in parallel with the primary synchronization code, the position of the secondary synchronization code can be found after the first step. The received signal at the positions of the secondary synchronization code is consequently correlated with all possible secondary synchronization codes for code identification. 15 consecutive codes received and identified within one frame construct a received sequence. Because the cycle shifts of the 64 sequences corresponding to 64 code groups are unique, by correlating the received sequence with the 960 possible sequences, the code group for the strongest base station as well as the frame synchronization is determined.
Step 3: Scrambling-code Identification
During the last step of the cell search procedure, the mobile terminal determines the exact primary scrambling code used by the found base station. The primary scrambling code is typically identified through symbol-to-symbol correlation over the Common Pilot Channel (hereinafter CPICH) with all codes within the code group identified in the second step. After the primary scrambling code has been identified, the Primary Common Control Physical Channel (hereinafter PCCPCH) can be detected. Then the system and cell specific information can be read.
In sum, the main tasks of the initial cell search procedure are to (1) search for a cell with the strongest received power, (2) determine frame synchronization and code group, and (3) determine the down-link scrambling code.
An intuitive implementation for code group identification and frame synchronization are illustrated in
FIG. 3. R
I
(m) and R
q
(m) are signals demodulated by QPSK (quaternary phase shift keying) with phase difference of &pgr;/2. 16 correlators
2101
~
2116
correlate R
I
(m) and R
q
(m) received in a slot with different correlation co-efficiencies, respectively, to determine the similarities for the representation of R
I
(m) and R
q
(m) to 16 orthogonal codes CS
1
to CS
16
. A code location table
26
records the 64 code groups in
FIG. 2
, totaling 960 secondary synchronization codes. The code location table
26
sequentially provides the stored secondary synchronization codes. For example, in a first time slot, the code location table
26
sends out the 960 secondary synchronization codes from the codes in column
1
to the codes in column
15
. In a next time slot, the code location table
26
sends out the 960 secondary synchronization codes from the codes in column
2
to the codes in column
15
and back to codes in column
1
, etc. It is emphasized that the output sequence from the code location table
26
is slot-dependent. The 16-to-1 multiplexor passes one of the 16 similarities from the correlators, according to the secondary synchronous code it received, to one of the 960 shift registers
24
. 960 shift registers
24
store the 16 similarities within a slot, and accumulate the similarities from slot to slot. After accumulating within a frame (15 slots), a maximum finder
25
can find one of the 960 shift registers
24
having a highest similarity and determines the frame boundary and the code group.
SUMMARY OF THE INVENTION
Therefore, an object of the present invention is to provide an apparatus and method for efficient code group identification and frame synchronization.
To achieve the aforementioned purpose, the present invention provides a method for code group identification and frame synchronization. The first step of the method is providing secondary synchronization code sequences SSCS
1
, SSCS
2
, . . . , SSCS
K
with length of L codes. The secondary synchronization code sequences SSCS
1
, SSCS
2
, . . . , SSCS
K
are corresp

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